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ESB/DAQ Readout + System Testing

US/Eastern
Description
https://uregina-ca.zoom.us/j/98915102548?pwd=6Be10hz7OQ3WLS2NvFGKcenSx5MbF6.1

ESB/Systems Testing Meeting

September 22, 2026

Attendees

Tegan Beattie, Jun Hyung Park, Halen Davies, Shinhyung Kim, Bobae Kim, Junseop Shin, Shefali X, Wouter Deconinck, Bo Gyeong Seo, Maria Żurek, Jeonsgu Bok, Zisis Papandreou

Agenda

  1. Announcements, Updates, Goals
  2. DAQ issues found in CERN beam-test data analysis
  3. SiPM gain calibration and preliminary cooling-test results
  4. Action Items
  5. AOB
  6. Next meeting

Minutes

  1. Announcements, Updates, Goals: 
    1. Electronics Consolidation: The planned meeting at NASA with all the engineers together (NASA, ORNL, OSU, Hungary) is now scheduled for November 3-5.
    2. Summing Board Consolidation: Zisis to plan summing board meeting. The goal is to select a design by February 2027.
    3. Shinhyung, Aram and Zisis have met to compare differences between the KNU and Regina sum/amplifying boards. They are collecting info on the Google Drive and will assemble it into a report.
    4. Zisis and Wouter reported on a meeting with Yale (Prakhar Garg and Helen Caines) to see if their automated setup could be adapted for our arrays, for individual pad tests. This was used for LFHCAL.  But we also need tests across the whole SiPM (ie cross talk).
    5. Maria brought up that SiPMs (as a whole for the detection) under CD3a/b, so some baseline SiPM QC document must exist. Maria asked about small scale testing to establish time and labour needed.  Zisis said that some of those have been tested but more need to be evaluated (eg I-V curve). A senior-project student just started at Regina.
  2. DAQ issues found in CERN beam-test data analysis: Jun Hyung presented KNU work:
      •  checked noise level (pedestal run with clock trigger); event by event examination: ADC ==0 which affects integral; tail from previous appears, TOA/TOT values appeared for pedestal event, ADC~0 for some event!  Is it due data decoding?  ADC values looked at for all channels; H2GCROC has two channels. ADC==0 occurs at ASIC-wide level at same sample but issue also appear at specific channel in specific sample. Checked sample distributions for ADC<20. 1-2% of total events. Decided: exclude events ADC<20 cleaned up intADC. Calorimeter plots look good.
  1. SiPM gain calibration and preliminary cooling-test results: Junseop presented KNU work:
      • SiPM Gain calibration for 87 SiPMs (1389 channels) and cooling tests.
      • Gain: analyzed waveforms pulse height = peak - baseline, SPE 2-1 p.e diff used for gain; SPE 149 ADC channels. 3 channels disabled: two peaks seen: possible explanation one of preamplifier board has difference performance - being checked. Plotted mean voltage of arrays: mean ~40.964 V; voltage deviation of 16 channels sigma = 0.0112 and mean=0.0258.  Deviation reasonable.
      • Cooling: overbias affects gain; Hamamatsu: DeltaTVop 34 mV/deg C. DCR measured at 10. 15 20 and 25 C. Chiller, temp controller. Aluminum plate, flow meter. Black blankets. Bias at 42 V. Gain decreases linearly with temp.  DCR increases with temp linearly: DCR fitting logic. 0.76 MHz at 10 C, 1.5 MHz at 25 C.
      • CERN tests compare common 41 C vs channel-calibrated bias to see if the latter improves data performance.
      • Future cooling: using dummy board to same shape as bulk PbSciFi in BIC.  Using resistors, and will increase power to simulate heat load.
  1. Action Items:
    1. Shinhyung, Aram and Zisis will write up a tech doc on amp/summing board comparisons.
    2. Collectively we will create our own SiPM QC doc and uploaded to the BNL site.
  2. AOB: none
  3. Next meeting: 
    1. ESB/DAQ: October 6.
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