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Roman Pots Meeting (eRD24)

US/Eastern
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Meeting ID: 913 7148 3511
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- Schedule and Budget:

  • By summer we expect project funds will be available, and we hope to have funds for Generic R&D (TBD)
  • In March report we will include estimate of budget request to be made in the Summer report, and should include also estimate for full cost of the final detector
  • Start Report write-up about February 15th

1) Performance

  • Updates are expected for the March report o machine background (e.g. beam gas), and geometry of RPs.
  • Other engineering studies, e.g. on integration are not urgent

2) Electronics

  • Table of specifications will be compiled and provided, including the following info for prototypes and final detector: Sensor Capacitance, Total Bandwidth, Memory Length, Occupancy, Charge, Cross Talk, Time Window, TOT range and accuracy, Power Dissipation, Clock
  • Funds available for a production in 2021: max 4x8 channels, 500 um picth
  • Main question to address is whether we can fit 2x TDC (TOA and TOT) and Memory in 500 um pitch with 130 nm technology. For the TDC the CMS High Granularity Calorimeter (HGC-ROC) TDCs will be used (it can reach 20 ps and are for 130 nm). Alternative is to go for 65 nm technology, but will require much more work.
  • Nota Bene:
    • Since RPs will be triggerless, the main question to determine size of memory is about  expected bandwidth and occupancy
    • Detectors will not need to run cols like LHC, as radiation damage is negligible, we only need to remove heat from electronics
    • If necessary (e.g. if we cannot squeeze comfortably all electronics in 500 um pitch) we can envision rectangular pixels with 500 um pitch in one direction and longer picth in the other directions, and orient layers orthogonally in a single station. 
  • Parallel effort by UCSC on SiGe using TowerJazz processing
  • Budget Request will include production of Readout Boards by SLAC or BNL

3) Sensors

  • Presentation by G. D'Amen on BNL progress and plans
  • 3 Testbeams planned as well as laser measurements
  • Plans to assemble and wirebond AC-LGADs+ALTIROC0 and then ALTIROC1 (check bonding diagrams for ALTIROC1)
  • Alessandro will follow up with SLAC on SLAC board production for reading out ALTIROC1
  • UCSC has carried out several tests of FBK AC-LGADs using lasers, pitches 200-500 um
    • problem with cross talk due to inter-strip capacitance for small gaps (~20 um)
  • TCAD simulation in 2D with 500 um pitch and varying gap sizes
    • study cross talk induced by inter-strip capacitance as well as signal sharing
  • Budget Request: 1 production at BNL and 1 joint with other projects by HPK
    • fixed pitch at 500 um and varying gap sizes, and varying n+ resistivities, as well as strip/pixel shapes (e.g. zig-zag)
There are minutes attached to this event. Show them.
    • 11:15 11:40
      Elecronics 25m
    • 11:40 12:05
    • 12:05 12:30
      Performance 25m
    • 12:30 12:45
      EIC schedule and deadlines 15m