TOF Coordinator Meeting

Thursday 3 Oct 2024, 11:00 → 12:20 US/Eastern

https://cern.zoom.us/j/4745455693?pwd=em8ybklNZ2VTTTdXWXcvZjNIclErZz09 (zoom)

Weekly ePIC TOF Coordinators/DSL meeting on cost/schedule and plans

11:00 → 11:50 preTDR draft and next step

feedback:
schedule figure
ZENODO?
any new updates?

(i) preTDR draft, Version0
The preTDR draft, Version0 is a successful exercise; by October 1st, the material from all the subsystems has been
uploaded, a part a single one, which is being added by Sunday October 6.
Following the request of several writers, the publication on ZENODO of Version0 is moved to
October 7th early hours (dead-line for material uploading on Sunday October 6th).
The current version on ZENODO is a placeholder.
The reviewing process will also start on October 7th.
Two google forms (one for chapter 2, the other one for chapter 8) are ready and,
starting on October 7th, the whole collaboration is invited to read and send feedback.
Moreover, the internal reviewers will scrutinize with particular care the sections assigned to them.

11:50 → 12:10 QA list

On Sep 29, 2024, at 11:54 PM, Sourav Tarafdar stara@jlab.org wrote:

Dear Satoshi and Zhangbu,

Project is currently collecting information about QA for each subsystem of ePIC. So from ToF consortium may can you please provide a quick list of components associated with ToF that are subject to quality control ? As an example I suppose each of the sensor for ToF will first undergo some sort of QA before using it for final ToF. Same will be probably for ASICS and of course there will be more components of ToF which will first undergo Quality Control before being used for final ToF assembly. If you can provide us ONLY the list of those items in next two weeks that will helpful. Later (possibly before CD2 early next year) one has to write a detail documentation on QA for each ToF components.

Thanks,
Sourav

List:

AC-LGAD sensors:
QA long-term and stress-test reliability studies of LGADs as a stepping-stone towards studies on AC-LGADs

For both sensors and readout chips, it is imperative to evaluate the yield of the test productions to adjust the final production orders. The QA plans to evaluate the yield of the sensor productions are as follows: each produced sensor will be tested in the laboratory in a probe station with simple current over voltage (IV) and capacitance over voltage (CV) tests

ASIC: (subsystems or project?)
To evaluate the yield of the chip (EICROC, FCFD) productions, a sample of chips (ALL CHIPS?) from each batch will be tested and probed for homogeneity in all the channels using a calibration input. All channels have to be within required homogeneity.

service and assembly:
Once the state of sensors, readout chips, and flex is advanced, a fully loaded demonstrator stave is envisioned. The mounting procedure will already be tested during the assembly of the thermomechanical demonstrator. The full demonstrator will then be tested with radioactive sources in laboratory or at test beams

Cooling systems: (Yi Yang)

Mechanic structure: (Andy, Sushrut)
stave:
support:

FEE: (Tonko)

readout chain: (Tonko)

LV/HV: (Tim)