WEBVTT 00:11:22.000 --> 00:11:29.000 Long, and so the first one is focused around. Synthesis and processing, uh, integration, that's led by. 00:11:29.000 --> 00:11:35.000 Jink Kyung Yoo up at St. Los Alamos. The second one is sort of now bringing the, uh. 00:11:35.000 --> 00:11:41.000 Materials together into looking at multimodal interactions, that's Ani Samant at, uh. 00:11:41.000 --> 00:11:49.000 Argonne CNM. And then, in terms of our use case and ML framework, Farah Fahim at Fermilab. 00:11:49.000 --> 00:11:58.000 Uh, leaves that thrust, and then. Nez Domingo at CNMS at Oak Ridge leads our cross-cutting characterization. 00:11:58.000 --> 00:12:04.000 Thrust. Other contributors are listed here, and I'll give you some contact information later. 00:12:04.000 --> 00:12:16.000 Chongyang Nam at CFN, Ricardo Ruiz out at the. Foundry, zooming loose on the phone, on the call here today, and we'll talk to you a little bit later. 00:12:16.000 --> 00:12:24.000 Waypan in San Diego, California. Um, I think Chen up at St. Los Alamos. 00:12:24.000 --> 00:12:32.000 Cattle and Spartaroo at Sandia Livermore. Sabika Sadamani, uh, here at Sint in Albuquerque. 00:12:32.000 --> 00:12:41.000 And Chris Chosowak at LB&L ALS light source, and Jiwon Kim at MIT, Dan Friedman. 00:12:41.000 --> 00:12:47.000 At Lincoln Labs, and uh…. Sap on our wall here at Zendia. 00:12:47.000 --> 00:12:51.000 So those are all the main team members, and of course now they're…. 00:12:51.000 --> 00:12:58.000 Assembling postdocs and other folks that are working with them. At each of these sites and on the thrusts. 00:12:58.000 --> 00:13:05.000 Of course, as we all know, uh…. You know, we're facing unprecedented energy efficiency challenge with. 00:13:05.000 --> 00:13:12.000 Microelectronics, I think we're all familiar with that, with. Um, you know, all of the, uh…. 00:13:12.000 --> 00:13:20.000 Data centers and AI, and…. Autonomous driving, and Internet of Things is all driving. 00:13:20.000 --> 00:13:35.000 A need for more and more efficient, uh, microelectronic technology. Um, and of course, AI is, uh, putting… putting a big strain, and these are just sort of predictions that I'm sure most of you have seen. 00:13:35.000 --> 00:13:43.000 In terms of the requirement for power. That's why a lot of new, uh, you know, venture capital folks and others are…. 00:13:43.000 --> 00:13:48.000 Investing in data centers and power centers to power the data centers. 00:13:48.000 --> 00:13:54.000 And, uh, this, you know, energy for AI training and, uh, you know, an inference eventually… event…. 00:13:54.000 --> 00:14:06.000 Inference. Um, it's kind of reaching…. A really significant fraction of the global energy budget, and we all need to do something about that, and. 00:14:06.000 --> 00:14:12.000 I think the 8 projects within. Meerkat are trying to tackle. 00:14:12.000 --> 00:14:16.000 One aspect or the other, whether it's the materials and device. 00:14:16.000 --> 00:14:25.000 Integration challenge, computing architecture. Uh, and many, many, many different aspects, and we're all going after a different part of that. 00:14:25.000 --> 00:14:31.000 So, of course, it's good to be on the phone with everybody so that we can start to pull these things together and see how we can. 00:14:31.000 --> 00:14:44.000 Leverage and take advantage of what we're all doing. Um, and so this, this, uh, view graph tries to summarize what the NSRC chip is doing in a big picture. 00:14:44.000 --> 00:14:49.000 Of course, as you know, um, you know, the CMOS scaling has been going from. 00:14:49.000 --> 00:14:58.000 You know, 100 nanometers to…. The very, uh, most cutting edge from TSMC on the order of, you know, 2 to 5. 00:14:58.000 --> 00:15:05.000 Nanometer gate lengths, and…. Pushing to go lower and lower into, sort of, the atomic limit. 00:15:05.000 --> 00:15:10.000 Um, and, you know, that's spurring other research, because that, of course, is getting. 00:15:10.000 --> 00:15:16.000 Harder and harder. And there's sort of two pathways that this is taking. 00:15:16.000 --> 00:15:24.000 Sort of a heterogeneous integration pathway of a…. Advanced packaging and chiplet architectures, and some of that's being. 00:15:24.000 --> 00:15:30.000 Worked in Meerkat as well. And then, uh, sort of continued CMOS scaling and innovation. 00:15:30.000 --> 00:15:36.000 And so, um, you know, from our perspective, you know, we're not gonna, uh. 00:15:36.000 --> 00:15:46.000 Develop a whole new semiconductor technology. We really need to…. Push to integrate with Silicon Sea Moss, and uh…. 00:15:46.000 --> 00:15:52.000 And we're trying to do two important things there. Our team. One is develop. 00:15:52.000 --> 00:16:00.000 New advanced characterization, uh, capabilities to look at these. Atomic scale, uh…. 00:16:00.000 --> 00:16:06.000 You know, features that we're all gonna need to look at as we integrate, you know, 2D materials and other things. 00:16:06.000 --> 00:16:11.000 And then, uh, do an application to show the value of what we've done. 00:16:11.000 --> 00:16:16.000 For, you know, advanced high-energy physics detectors, and that's where Fermi. 00:16:16.000 --> 00:16:19.000 Fermilab comes in. I know several of the other projects in. 00:16:19.000 --> 00:16:26.000 Meerkat have kind of a similar… similar goal. Um, and, you know, we can really use a lot of, uh. 00:16:26.000 --> 00:16:30.000 Interaction and collaboration with the other teams to try to get that right. 00:16:30.000 --> 00:16:37.000 In terms of, you know, what we're doing on a materials device, what we're really thinking about is developing. 00:16:37.000 --> 00:16:43.000 Integration options into. This, uh, huge semiconductor, uh. 00:16:43.000 --> 00:16:49.000 Train in terms of, you know. Chiplet architectures and HI, and CMOS scaling. 00:16:49.000 --> 00:16:54.000 Where we're trying to look at, um…. You know, 2D materials for electronic. 00:16:54.000 --> 00:17:01.000 Applications, wide bandgap materials for sensing, communication, we're looking at 3.5 optical materials. 00:17:01.000 --> 00:17:03.000 We'll give you a tiny bit more details in a moment. 00:17:03.000 --> 00:17:13.000 And then neuromorphic materials for artificial intelligence. Of course, many of these, uh, there's, you know, very active areas of research, and I'm sure many of your laboratories. 00:17:13.000 --> 00:17:20.000 Have efforts, uh, along these lines. But there are really, uh, some major…. 00:17:20.000 --> 00:17:27.000 Challenges to be able to actually integrate these in. To, you know, a CMOS manufacturing setting. 00:17:27.000 --> 00:17:34.000 Still sort of defects. And interfaces, and things like that are…. 00:17:34.000 --> 00:17:42.000 Uh, getting in the way of these things actually being adopted, and I… I don't know if you folks saw this, but I… there was just an RFI. 00:17:42.000 --> 00:17:46.000 Out from the, uh…. Mapcast, uh…. 00:17:46.000 --> 00:17:52.000 National, you know, semiconductor technology center. Operator, uh, looking for. 00:17:52.000 --> 00:17:59.000 Information pertaining to. Basically, this problem here, adopting these novel materials. 00:17:59.000 --> 00:18:05.000 Into a CMOS, uh. Flow and, you know, what the challenges there are. 00:18:05.000 --> 00:18:16.000 Um, so that's really what our team is going after. And just to kind of summarize what those research challenges are. 00:18:16.000 --> 00:18:24.000 Broken it up into four overall areas where. You know, the first challenge, of course, is integration of non-silicon materials. 00:18:24.000 --> 00:18:35.000 With, uh, different or incompatible processing conditions and physics. In terms of charge, spin, thermal transport, as well as atomic defects and interfaces, so that's one thing we need to. 00:18:35.000 --> 00:18:40.000 Of course, focus on in this project, and then the second part is then, as you bring these together. 00:18:40.000 --> 00:18:46.000 Being able to understand, uh. You know, the interfacial properties of…. 00:18:46.000 --> 00:18:52.000 Integrating the 2D material. With a 3.5 or neuromorphic material. 00:18:52.000 --> 00:19:02.000 Um, third part would be developing these physics-informed, predictive. Models, you know, based on experimental demonstrations. 00:19:02.000 --> 00:19:06.000 And trying to get away from kind of a expensive trial and error. 00:19:06.000 --> 00:19:11.000 Search and parameter space, and then finally. Third challenge is having, uh. 00:19:11.000 --> 00:19:17.000 You know, advanced characterization, operando, multi-physics probes to be able to. 00:19:17.000 --> 00:19:26.000 Look at complex and buried interfaces. Um, you know, those challenges are broken up into, as I said. 00:19:26.000 --> 00:19:31.000 For different thrusts. The first one is synthesis and process integration. 00:19:31.000 --> 00:19:37.000 So there, we're really trying to establish, of course, the science and foundational epitaxy. 00:19:37.000 --> 00:19:44.000 Monolithic 3D better integration, be able to control the defects and material functions at the level. 00:19:44.000 --> 00:19:50.000 That it could be incorporated into, uh. Cmos manufacturing flow. 00:19:50.000 --> 00:19:58.000 And expected outcomes there…. Are, as you see here, complex heterogeneous materials and arrays and interfaces. 00:19:58.000 --> 00:20:03.000 Then the second part in thrust two is about multimodal interactions and bringing those. 00:20:03.000 --> 00:20:11.000 Individually optimized materials together. Into stacks of 2D and 3D materials, for example. 00:20:11.000 --> 00:20:18.000 And being able to understand, you know, how that interface. Properties change and affect each other's performance. 00:20:18.000 --> 00:20:23.000 And any new defects, and how that affects the device behavior. 00:20:23.000 --> 00:20:28.000 The third thrust, then, is around, as I mentioned, use cases and. 00:20:28.000 --> 00:20:34.000 Machine learning framework. Um, to help accelerate, uh, you know, basically take all the. 00:20:34.000 --> 00:20:39.000 Process data, the…. Performance and characterization data and build a. 00:20:39.000 --> 00:20:47.000 Ml framework that we can use and be predictive. And finally, the cross-cutting characterization. 00:20:47.000 --> 00:20:54.000 Thrust. Here, I'll just kind of capture a little bit more details of each of the thrusts. 00:20:54.000 --> 00:21:01.000 Um, and thrust one…. Around synthesis, process integration, this kind of breaks out. 00:21:01.000 --> 00:21:07.000 Uh, the material families that we're looking at, there's 4 different subthrust, A, B, C, D. 00:21:07.000 --> 00:21:16.000 Uh, as I mentioned before, why Bandgap, 2D. Neuromorphic and 3-5 materials, and these are representative, uh. 00:21:16.000 --> 00:21:20.000 Materials that the team is starting with, and of course, uh, you know. 00:21:20.000 --> 00:21:26.000 These will evolve over time, and. As the project goes forward, we'll sort of narrow the scope. 00:21:26.000 --> 00:21:31.000 Uh, depending how the integration. Uh, and pros… you know, it's going. 00:21:31.000 --> 00:21:37.000 And so these are some examples of, you know. 2d materials we'll be looking at. 00:21:37.000 --> 00:21:43.000 Neuromorphic materials and, uh, as well as the 3-5. Integration. 00:21:43.000 --> 00:21:48.000 Course 1 is for sort of high thermal conductivity and detectors. 00:21:48.000 --> 00:21:54.000 2d materials more for, uh, you know, 2D logic gates and…. 00:21:54.000 --> 00:22:00.000 Neuromorphin materials for defect-driven, you know. Neuronal materials, and then optoelectronics on the 3-5 side. 00:22:00.000 --> 00:22:07.000 So, there's sort of where we're starting, but there are other materials operation…. 00:22:07.000 --> 00:22:13.000 Um, you know, options that the team is looking into right now. 00:22:13.000 --> 00:22:19.000 And I'm sure many of your projects have some overlap with all this, and I think that'd be a good thing for us to. 00:22:19.000 --> 00:22:26.000 Identify and kind of work together. And thrust two, again, as I said, we take the materials that we…. 00:22:26.000 --> 00:22:31.000 Uh, developed and, and…. At least we think, are integratable processes. 00:22:31.000 --> 00:22:38.000 And then bring those together into different stacks. Um, and that's kind of shown in this blown up on the side of…. 00:22:38.000 --> 00:22:47.000 Where people think they'll be starting, in terms of. Single crystal diamond integrating with 2D materials and thrust 2A, and…. 00:22:47.000 --> 00:22:53.000 You can see several options in Thrust 2B. Of integrating different, uh…. 00:22:53.000 --> 00:22:59.000 2d materials is about 2D materials in diamond, and then Thrust C is integrating. 00:22:59.000 --> 00:23:06.000 You know, anywhere from one to a couple different materials in terms of diamond, oxides, and 2D materials, and same thing on the. 00:23:06.000 --> 00:23:10.000 Integration of 3.5 materials with 2D. So this is kind of where we're starting. 00:23:10.000 --> 00:23:14.000 Um, but as you know, it's the beginning of the project, and these will evolve. 00:23:14.000 --> 00:23:20.000 Over time, depending on success and how the team's working together. 00:23:20.000 --> 00:23:28.000 Uh, thrust 3, the use case and ML framework, uh, one broken out into in-detector sensing. 00:23:28.000 --> 00:23:33.000 And I believe Farah's online, she'll say a little bit more about that later, if she was able to make it. 00:23:33.000 --> 00:23:40.000 And then implementation of that use case on the other side is developing this predictive ML framework. 00:23:40.000 --> 00:23:46.000 Um, and, uh, neural net and circuit simulators. 00:23:46.000 --> 00:23:51.000 Um, this kind of captures what we're trying to do in the cross-guiding capability… characterization capabilities. 00:23:51.000 --> 00:23:58.000 Led by Nez Domingo at CNMS Oak Ridge. Uh, so sort of 3 overall areas. 00:23:58.000 --> 00:24:04.000 One is what she's calling monitored. Which is the synthesis of, sort of, ultra-clean interfaces, where. 00:24:04.000 --> 00:24:12.000 Be able to stack these things in their scanning probes. Um, and, uh, do a variety of experiments. 00:24:12.000 --> 00:24:18.000 And then, uh, in Operando, in terms of probing buried interfaces. 00:24:18.000 --> 00:24:28.000 Things like photoluminescence or synchrotron x-rays and nanoarpis. At ALS, and the foundry, and the Quantum Press integration. 00:24:28.000 --> 00:24:37.000 Tool that's at CFN Brookhaven. That's a ultra-fast electron microscope out in San Diego, California. 00:24:37.000 --> 00:24:46.000 On just chip testing platforms, more in situ. Passive AFM, nano X-ray, you know, all the standard probes. 00:24:46.000 --> 00:24:56.000 As well as, uh. What we're calling a compact platform that, uh, Zooming will say a little bit about in a few minutes. 00:24:56.000 --> 00:25:01.000 Um, that's kind of, you know, a general overview of where we're going and what we're trying to do. 00:25:01.000 --> 00:25:06.000 I thought it would be helpful for everybody, you know, I can send this out. 00:25:06.000 --> 00:25:13.000 Um, as many of you may know. Um, you know, DOE has asked us to pull together. 00:25:13.000 --> 00:25:22.000 All 8 of our projects into a…. You know, uh, cooperative, collaborative center that we've called Meerkat. As part of that. 00:25:22.000 --> 00:25:29.000 All of the PIs, we wrote up a collaboration plan. And define these four working groups. 00:25:29.000 --> 00:25:32.000 And, uh, the four working groups are seen there on the right. 00:25:32.000 --> 00:25:38.000 Materials and devices are all in. Hi and characterization. 00:25:38.000 --> 00:25:43.000 Working Group 3 methodologies, Architects, intelligent Sensing, Advanced P&W, something more. 00:25:43.000 --> 00:25:47.000 Valerie, who's on the line, is going to be focusing on, and then…. 00:25:47.000 --> 00:25:53.000 Fourth one is around, uh, workforce development. And so I…. Put up all of our team members. 00:25:53.000 --> 00:26:02.000 And their emails, and sort of map them into…. These working groups. So, as you might imagine, given what I've just talked about. 00:26:02.000 --> 00:26:07.000 Um, we have a lot of folks that would be interested in collaborating, working. 00:26:07.000 --> 00:26:12.000 Working within working groups 1 and 2. And those folks are listed there. 00:26:12.000 --> 00:26:20.000 And then we have a number of folks. Catalan, Daniel Friedman, and Sapon. 00:26:20.000 --> 00:26:26.000 Who are more aligned with, uh. Working Group 3, and so this just gives you some. 00:26:26.000 --> 00:26:32.000 Idea about how we, uh, how we might…. Begin to collaborate and cooperate within. 00:26:32.000 --> 00:26:38.000 Within these groups. Or in the project, sorry. 00:26:38.000 --> 00:26:44.000 So, what I wanted to kind of end with and transition to Zooming and Farah said, if she's on the line. 00:26:44.000 --> 00:26:51.000 Is I, you know, along with all of the. Potential materials and device characterization, fabrication, things like that. 00:26:51.000 --> 00:26:56.000 Opportunities to collaborate. I thought I'd just mention two. 00:26:56.000 --> 00:27:04.000 One is this cross-cussion… in the cross-cutting capability… characterization capabilities. What we're calling our compact characterization platform. 00:27:04.000 --> 00:27:08.000 And then the second part would be having Farah say a few things about. 00:27:08.000 --> 00:27:16.000 In-detector sensing and thrust 3, which. I know shares, uh, features with many of the other projects. 00:27:16.000 --> 00:27:22.000 So, uh, I think that's where I'm gonna stop, and I can take some questions before we…. 00:27:22.000 --> 00:27:32.000 Maybe transition to Zooming to say a little bit about Compact. 00:27:32.000 --> 00:27:40.000 Any, uh, thoughts, questions? 00:27:40.000 --> 00:27:45.000 Okay, um, and I'll let, uh…. So Ming, do you want to take over for a couple slides? 00:27:45.000 --> 00:27:57.000 Uh, yeah, sure. I'll…. Start sharing, uh, the slides. 00:27:57.000 --> 00:27:58.000 Yeah. Yeah. 00:27:58.000 --> 00:28:09.000 I… can you see the slides now? Okay. Um, yeah, so I'll talk about, uh, see if I can go through full screen. 00:28:09.000 --> 00:28:12.000 Is this good? Okay, um, so yeah, I'll talk about the compact, uh, project that we're working on. 00:28:12.000 --> 00:28:17.000 Yeah. 00:28:17.000 --> 00:28:27.000 Um, under this, um…. And it's our trip program. Uh, Compaq is co-designed, multimodal platform for. 00:28:27.000 --> 00:28:35.000 Accelerated categorization and testing. Um, it's going to be a collaboration, and it is a collaboration between all five. 00:28:35.000 --> 00:28:44.000 Nsrcs, uh, under DOE. Um, so the motivation here is actually quite simple. 00:28:44.000 --> 00:28:54.000 Have been working with a lot of magical materials that, uh, that people claim can be very useful for a lot of microelectronics applications. 00:28:54.000 --> 00:29:00.000 Uh, you can make magic widgets out of those. Um, and…. 00:29:00.000 --> 00:29:05.000 Here at NSRCs, we collaborate with a lot of university groups, and internally as well. 00:29:05.000 --> 00:29:11.000 Uh, so that we have the opportunity. To work with all these materials, so we have a lot of, um. 00:29:11.000 --> 00:29:17.000 Of experience of handling with these very exotic, uh, stuff, but also that. 00:29:17.000 --> 00:29:22.000 Um, that's also one of our pain points, because for each material. 00:29:22.000 --> 00:29:26.000 We have to figure out a very special way of working with them. 00:29:26.000 --> 00:29:32.000 And then, um, there are so many different properties that one can probe. 00:29:32.000 --> 00:29:35.000 Out of each material. I can look at the electrical property. 00:29:35.000 --> 00:29:44.000 The magnetic prophecy, the thermal destructor, optical, mechanical, and chemical. Uh, so it's going to be a very challenging task. 00:29:44.000 --> 00:29:56.000 Trying to understand, uh, a material very well. Um, it's very time-consuming thing, right? There are so many properties to interact with the world, or the material to interact with the world. 00:29:56.000 --> 00:30:01.000 As you want to characterize them. There's also this inverse problem that, uh. 00:30:01.000 --> 00:30:08.000 Very often, people don't think about. If we're going to use this material, uh, in microelectronics applications. 00:30:08.000 --> 00:30:18.000 Very, very often, we have to consider how is that. Compoundable, uh, with existing silicon CMOS, right? At least for the immediate future. 00:30:18.000 --> 00:30:28.000 Um, we're not going to replace CMOS completely, so most likely they'll work together so that we have more functionalities and then more. 00:30:28.000 --> 00:30:34.000 Um, interesting things that we can do, but…. Cmos is still there, so…. 00:30:34.000 --> 00:30:39.000 Adding that additional material, how is that going to change the second CMOS part, or how is that compatible with the fabrication? 00:30:39.000 --> 00:30:47.000 Right, so now going back to the materials capitalization, um, our standard, uh, methodologies right now is that we have this material. 00:30:47.000 --> 00:30:52.000 And if I want to understand the electrical properties, then I will take that material and then do some. 00:30:52.000 --> 00:31:02.000 Fabrication, to turn that into a electrical testing device. And that might be months of development of fabrication, and then finally I can do that experiment. 00:31:02.000 --> 00:31:10.000 Same thing for thermal properties, and another piece. For doing, um, optical characterization. 00:31:10.000 --> 00:31:13.000 And they may have different fabrication paths, so that they're all. 00:31:13.000 --> 00:31:17.000 Uh, develops separately. Right, incentive for, um…. 00:31:17.000 --> 00:31:22.000 The structural categorizations will. So that brings us a lot of challenges. 00:31:22.000 --> 00:31:32.000 Uh, well, number one. Do we have enough growth repeatability so that we have confidence saying that, well, sample A for electrical is the same sample. 00:31:32.000 --> 00:31:39.000 Um, at least nominally, as simple B for thermal, simple C for optical, and simple D for, uh, you know, TN. 00:31:39.000 --> 00:31:48.000 Categorization. Um, that is not an easy question to answer. Another challenge is that, well, to do these simple prep and fabrication. 00:31:48.000 --> 00:31:58.000 Uh, we… unavoidably have to do something to the material. What is the impact, and then if we have to do very complicated, simple preparation. 00:31:58.000 --> 00:32:06.000 Um, sometimes the… you lose the material. Properties that you want to actually measure, right? You lose the intrinsic. 00:32:06.000 --> 00:32:15.000 Things that you want to characterize. And finally, another challenge is that there are so many different measurement protocols, especially across different. 00:32:15.000 --> 00:32:23.000 Labs, different groups that. The measured properties, sometimes it's a little bit hard to compare. 00:32:23.000 --> 00:32:31.000 Uh, because you don't know whether people use this current to measure this property, or that field to measure that property. 00:32:31.000 --> 00:32:37.000 So, what we would like to, uh…. Bring to the world is this compact, um. 00:32:37.000 --> 00:32:42.000 Widget. Um, what should this thing do if we can make a wish? Well. 00:32:42.000 --> 00:32:48.000 Ideally, this can be used for a synthesis of. Exotic, novel material. 00:32:48.000 --> 00:32:56.000 And then, uh, it should require minimal processing and have minimal impact on the material after the synthesis. 00:32:56.000 --> 00:33:02.000 And it should be able to support as many characterizations as possible, including all the characterizations that. 00:33:02.000 --> 00:33:10.000 People want to do. Uh, there should be standardized measurement protocols so that there's no ambiguity when we compare results. 00:33:10.000 --> 00:33:16.000 And finally, ideally, this thing has to be, uh, or if it can be intelligent. 00:33:16.000 --> 00:33:21.000 Uh, it knows what to do once there's a material on there that would be great. 00:33:21.000 --> 00:33:31.000 And then that'll improve the characterization throughput. Um, quite a lot, right? So this is what we would like to get if we…. 00:33:31.000 --> 00:33:39.000 Complete this project. So, we envision two types of deliverables. The first one is a passive. 00:33:39.000 --> 00:33:49.000 Compact substrate. The passive substrates can be made of silicon, for example, and then there will be, uh, through silicon vias, so that we can, uh, create. 00:33:49.000 --> 00:33:55.000 Uh, backslide contacts. And all the passive, um, testing structures. 00:33:55.000 --> 00:33:59.000 Will be built. On the substrate already. 00:33:59.000 --> 00:34:04.000 After all that is done, we'll give that chip to, uh, material synthesis…. 00:34:04.000 --> 00:34:11.000 First groups, so they can put down their novel, uh, thin film or materials that they, they, they, uh, want to characterize. 00:34:11.000 --> 00:34:19.000 Right? And then after that, uh, we can do additional. Back in fabrication to process the material to some degree. 00:34:19.000 --> 00:34:24.000 But we can also go directly. Block that, uh, silicon chip. 00:34:24.000 --> 00:34:30.000 Onto a, uh, already assembled. Circuit board, uh, with the right contacts. 00:34:30.000 --> 00:34:33.000 And then just load that on there, mount it on there. 00:34:33.000 --> 00:34:43.000 And then all the characterization protocols are handled by. This already assembled electrical system on this circuit board. 00:34:43.000 --> 00:34:51.000 Uh, so that way, uh, there is minimal material processing that's required, there's minimal fabrication that needs to be developed. 00:34:51.000 --> 00:34:55.000 Uh, so then that'll increase the throughput of material development and the feedback. 00:34:55.000 --> 00:35:05.000 Uh, as well as, um, standardizing the characterization protocol. So that's the first type of compact substrate that we will deliver. 00:35:05.000 --> 00:35:15.000 The second one is more, uh, ambitious, right? The…. Silicon platform itself can actually be active, because it's silicon. We know how to make circuits. 00:35:15.000 --> 00:35:22.000 So if we can make active, um. Application-specific ICs, so then, um, we can actually do more things to it. 00:35:22.000 --> 00:35:30.000 Right? So, those ICs can come from, um, commercial foundries through their multi-project wafer services. 00:35:30.000 --> 00:35:36.000 Or, uh, here, at least within Sendia, we know how to make silicon CMOS. 00:35:36.000 --> 00:35:48.000 Uh, either in our, uh, microfab and in silica mesa. Or within scent as well. So, that gives us a lot more, uh, flexibility in what we can do with this platform. 00:35:48.000 --> 00:35:52.000 Uh, one thing that we can use this to study is that. 00:35:52.000 --> 00:35:59.000 Well, we will build active silicon, uh, CMOS circuits. And, uh, it'll be intelligent, but also that. 00:35:59.000 --> 00:36:05.000 Gives us a way to evaluate this inverse problem when we add this material, when you synthesize this material. 00:36:05.000 --> 00:36:12.000 What its impact on the silicon circuit, right? It might not be compatible, right, if you have to. 00:36:12.000 --> 00:36:20.000 Elevate the synthesis temperature to 800 degrees C. So, that gives a way to a vehicle to test that impact. 00:36:20.000 --> 00:36:30.000 So this, uh, will be the more, um…. Ambitious, uh, goal here. 00:36:30.000 --> 00:36:37.000 So, this is a very rough timeline of what we want to be able to deliver. So, by the end of. 00:36:37.000 --> 00:36:47.000 The project by year 4, I think, uh. We should be able to deliver different versions of Compact. The active kind, and also the passive kind. 00:36:47.000 --> 00:36:52.000 For the passive kind, we believe we can deliver on different, uh. 00:36:52.000 --> 00:36:57.000 Materials, so we can use silicon, or we can use sapphire, which might be very attractive for. 00:36:57.000 --> 00:37:04.000 Material synthesis that will. Require much higher synthesis temperatures that silicon cannot, um. 00:37:04.000 --> 00:37:12.000 Sustain, or the circuits, or the materials cannot sustain. Um, we will also create different subversions of those, uh. 00:37:12.000 --> 00:37:18.000 Compact platforms, so that, uh, we can target different material classes and different. 00:37:18.000 --> 00:37:28.000 Applications. For example, if there are. Materials that only work at low temperatures, such as superconductors, then will tailor, uh, make those. 00:37:28.000 --> 00:37:32.000 Uh… compact…. Chips for… for those applications. 00:37:32.000 --> 00:37:47.000 Um, so going backwards in the milestones, um. We would want to deliver the passive silicon and sapphire version with the characterization capability on the circuit board level. 00:37:47.000 --> 00:37:54.000 By year 3. So then by year 2, we want to be able to deliver individual modules for different characterization modes. 00:37:54.000 --> 00:38:02.000 Non-electrical, uh. And then, uh, in year one, we want to demonstrate all the electrical characterization modes, including. 00:38:02.000 --> 00:38:12.000 Standard electrical transport, DC transport. Ac measurement, impedance measurement, so we can do, uh, capacitive measurement, inductive measurement, and then also microwave. 00:38:12.000 --> 00:38:19.000 Spectroscopy. Now, we want to demonstrate this, uh…. 00:38:19.000 --> 00:38:26.000 On various materials that we are interested in. So, as Jeff mentioned, there are so many different materials that, uh, the. 00:38:26.000 --> 00:38:34.000 The project will explore, so pretty materials, metal films, semiconductor, magnetic, insulators. 00:38:34.000 --> 00:38:39.000 Etc. And I think this is the place that we, uh. 00:38:39.000 --> 00:38:46.000 Really, really want to collaborate with other NSRCs, and then also other members within the Miracap. 00:38:46.000 --> 00:38:56.000 Our center and also other MSRCs as well. Uh, and then going beyond year one, going backwards, uh, we will look at and incorporate. 00:38:56.000 --> 00:39:06.000 Requirements from other characterization modes, uh, for example, optical characterization. And then, uh, X-ray characterization, structural characterization. 00:39:06.000 --> 00:39:10.000 We will make the structures to be compatible with those characterizations so that. 00:39:10.000 --> 00:39:16.000 This platform becomes more versatile, can have many, many different modes. 00:39:16.000 --> 00:39:22.000 Uh, so that we can get very, uh, coherent set of, uh, properties. 00:39:22.000 --> 00:39:29.000 I think that pretty much captures what we would like to do for, uh, for Compact. 00:39:29.000 --> 00:39:39.000 Thanks, Amin, that was great. Any questions? When folks… yeah, go on. 00:39:39.000 --> 00:39:45.000 Thank you very much for this presentation, and outline of this testing characterization capabilities. 00:39:45.000 --> 00:39:52.000 My question is a bit about. Resources in terms of infrastructure that, uh. 00:39:52.000 --> 00:39:58.000 You intend to use within, you know, your project, and that could be. 00:39:58.000 --> 00:40:04.000 Potentially shared among other projects. So, could you maybe give some…. 00:40:04.000 --> 00:40:07.000 And I know there can be too much to say, but. 00:40:07.000 --> 00:40:18.000 Some outline of, um…. What infrastructure you're planning to use, whether it's gonna be some sort of user's facility. 00:40:18.000 --> 00:40:27.000 Types of infrastructure, how such infrastructure could be. Shared among several projects to improve efficiency of, you know. 00:40:27.000 --> 00:40:33.000 For example, characterization, because I think in several projects, we do have. 00:40:33.000 --> 00:40:46.000 Materials involved and characterization of materials-based, uh. Samples, devices, and then even later on going into some more complex chips. 00:40:46.000 --> 00:40:52.000 Yeah, uh, so I think for the compact itself, uh, our idea is that. 00:40:52.000 --> 00:40:58.000 We will, uh…. Provide, or develop and provide. 00:40:58.000 --> 00:41:03.000 Uh, this base…. Pc board system, or electrical system. 00:41:03.000 --> 00:41:14.000 So that once the chip is fabricated, all the interfacing. All the interfaces will be standardized, so you just need to put that chip. 00:41:14.000 --> 00:41:25.000 Onto this, uh, machine, if you will. Uh, and then there should be standardized, uh, software that will communicate with this circuit board. 00:41:25.000 --> 00:41:32.000 And the circuit board within cultural all the analog and digital circuits to do all the required measurements. 00:41:32.000 --> 00:41:36.000 And of course, we can, um…. Customize all the…. 00:41:36.000 --> 00:41:49.000 Hardware so that the machine can do different, uh, things. For, um, different purposes. So I think this is where we are, uh, very excited to collaborate with different projects. 00:41:49.000 --> 00:41:54.000 So yeah, if there are any…. Ideas that you think. 00:41:54.000 --> 00:42:00.000 Which incorporates, uh, this is a great time, just because we're, you know, designing and then. 00:42:00.000 --> 00:42:06.000 Trying to, uh, plan now the prototypes. 00:42:06.000 --> 00:42:09.000 That answer your question? Gregor? You know, we're going to use scint, and then the larger Mesa fab at. 00:42:09.000 --> 00:42:15.000 Yeah, I think…. 00:42:15.000 --> 00:42:18.000 At Sandia, and then outside, uh, vendors. 00:42:18.000 --> 00:42:22.000 Mm-hmm, thanks, thank you. 00:42:22.000 --> 00:42:23.000 Um, I think this… sorry, go ahead. 00:42:23.000 --> 00:42:32.000 Because this is Valerie. Okay, um, I just had a question related to Gregor about the characterization. 00:42:32.000 --> 00:42:33.000 Um, so this is Valerie. Um, and that is…. 00:42:33.000 --> 00:42:37.000 Mm-hmm. 00:42:37.000 --> 00:42:42.000 Two, um, so you mentioned the… the scent, um, and what you're doing there. 00:42:42.000 --> 00:42:44.000 Mm-hmm. 00:42:44.000 --> 00:42:55.000 But I was wondering, too, are you also using other. Facilities, like, for example, the light sources, um, in some way. Okay, so…. 00:42:55.000 --> 00:42:56.000 And…. 00:42:56.000 --> 00:43:02.000 Yeah. So, yeah, Zumin could say some more, but Valerie, when the original idea came, and kind of what should be on there. 00:43:02.000 --> 00:43:08.000 We have input from, of course, Argonne, you know, light source, Berkeley. 00:43:08.000 --> 00:43:09.000 Utron's always, you know, uh…. Brookhaven, tried to get their input on. 00:43:09.000 --> 00:43:13.000 Right. 00:43:13.000 --> 00:43:19.000 How they would integrate. Those capabilities into this one. Is that fair to me? 00:43:19.000 --> 00:43:25.000 Yeah, I think that's totally fair. Uh, so we do want to include as many, uh, characterization. 00:43:25.000 --> 00:43:30.000 These, uh, on this platform. So, the, uh…. 00:43:30.000 --> 00:43:34.000 Electrical is the one who we'll go after first, because that's what. 00:43:34.000 --> 00:43:36.000 We know how to do, and that's probably the simplest as well. 00:43:36.000 --> 00:43:38.000 Right. 00:43:38.000 --> 00:43:43.000 But we definitely will consider, and then, uh, yeah, we have had conversations with, um. 00:43:43.000 --> 00:43:47.000 Of the light source at Berkeley, and then…. Uh, also the microscopy centers at Oak Ridge. 00:43:47.000 --> 00:43:49.000 Up, honey. 00:43:49.000 --> 00:43:54.000 Um, so yeah, we definitely are including all the ideas they want to have. 00:43:54.000 --> 00:43:58.000 On this platform, for example, I think, um, Oak Ridge wants to have. 00:43:58.000 --> 00:44:05.000 Uh, active, uh, platform for their, uh, transmission electron microscopy experiments. 00:44:05.000 --> 00:44:08.000 I think that's definitely a great direction, so that you can probe. 00:44:08.000 --> 00:44:18.000 Um, materials with, uh. Those signal lines while being examined within TEA. So yeah, those things are considerations that we will. 00:44:18.000 --> 00:44:25.000 Who incorporates. In the design phase, and then we'll try to implement that in year two. 00:44:25.000 --> 00:44:26.000 So, x-rays at APS or something, right? 00:44:26.000 --> 00:44:35.000 Okay. Right, okay, so… because that's what I thought about when Gregor, um, mentioned about, um. 00:44:35.000 --> 00:44:41.000 Different user facilities, and then with this data, the characterization be…. 00:44:41.000 --> 00:44:49.000 Archived and available in some database, or…. Um, and yes, so that question, too. 00:44:49.000 --> 00:44:57.000 Oh, that's a great question. Uh, yeah, we probably need to look into that, but yeah, I haven't put much thought into that one. 00:44:57.000 --> 00:45:02.000 Okay, because, yeah, that… that would be good for sharing if, um…. 00:45:02.000 --> 00:45:12.000 There's some way to archive, because we…. We're looking at it from a co-design standpoint, and so, um, having a characterization, um. 00:45:12.000 --> 00:45:18.000 Available would be really good, because I see, um, Yuming on here as well, so… okay. 00:45:18.000 --> 00:45:25.000 As soon as that dollar, is that something that… that you guys could interact with us on? 00:45:25.000 --> 00:45:31.000 We probably could do it, but probably do it clumsy and a lot slower than I'm sure you guys are set up for. 00:45:31.000 --> 00:45:38.000 Oh, in terms of… I was gonna say, we could utilize, and we… your characterization that's available. 00:45:38.000 --> 00:45:40.000 Yeah, sure, sure. 00:45:40.000 --> 00:45:48.000 Yeah, but we would, you know, so in terms of having a database, we're happy to collaborate, but it's not where we have a database either. So, I was…. 00:45:48.000 --> 00:45:49.000 Yeah. 00:45:49.000 --> 00:45:54.000 Wondering, given that was a…. A major component if you were having that… that database. 00:45:54.000 --> 00:45:59.000 Man, I think the best way would be to have it somehow available so that the other teams. 00:45:59.000 --> 00:46:05.000 Have it if they're gonna need co-design. Data of materials and devices and things. 00:46:05.000 --> 00:46:08.000 Right. Yes. 00:46:08.000 --> 00:46:16.000 Gotcha. Other questions? 00:46:16.000 --> 00:46:17.000 Yeah, yeah, I was hoping you'd ask some questions. 00:46:17.000 --> 00:46:25.000 Um, this is Archana Raja from, uh, LBL. Hi! Yeah, yeah, uh, cause, uh, Tev, um, I was pinging Teb, um, Teb, are you there? 00:46:25.000 --> 00:46:27.000 Okay, he seems to be… but yeah, Ted and I are growing, um…. 00:46:27.000 --> 00:46:30.000 Yes, I'm here. 00:46:30.000 --> 00:46:36.000 You know, we're working on a number of, um, 2D materials that are a bit different from what G1 might be making. So, Teb, are you… I see you unmute yourself. 00:46:36.000 --> 00:46:39.000 Mm-hmm. 00:46:39.000 --> 00:46:41.000 Yeah, I'm here. I'm here, can you hear me? 00:46:41.000 --> 00:46:48.000 Yeah, yeah, sorry, yeah. Um, I was gonna say, uh, I don't want to speak for you, but maybe if we go back a couple of slides…. 00:46:48.000 --> 00:46:54.000 Um, uh, yeah, here, yeah, no, sorry, yeah, uh, yeah, the passive compact substrate. 00:46:54.000 --> 00:47:04.000 Um, I mean, I was just curious what the…. You know, limitations on the deposition, or if, say, TEB were to grow something on it, like. 00:47:04.000 --> 00:47:08.000 Um, what's the thermal budget of these substrates right now? 00:47:08.000 --> 00:47:16.000 Yeah, so that's one of the biggest concerns, uh, and then you probably know Ji Huang, so we actually, uh, had a conversation. 00:47:16.000 --> 00:47:18.000 About growing 2D materials. Um, so I think for… from what he told me. 00:47:18.000 --> 00:47:21.000 Mm-hmm. 00:47:21.000 --> 00:47:27.000 Uh, some of the materials can be grown at temperatures below 500. 00:47:27.000 --> 00:47:35.000 So, for those, we can probably go with silicon. Substrates, which we know how to, uh, process fairly well, so we can easily do. 00:47:35.000 --> 00:47:39.000 All these, uh, backside contacts, and then passivate the front side with…. 00:47:39.000 --> 00:47:51.000 Dielectric layers, so that it doesn't affect the synthesis. Um, for materials or systems that need to go to higher temperatures. 00:47:51.000 --> 00:47:56.000 Uh, one thing we are, uh, considering is to produce Sapphire-based. 00:47:56.000 --> 00:48:03.000 Platform, so that, uh, it can survive at higher temperatures. That also means all the, uh. 00:48:03.000 --> 00:48:08.000 Metals and dielectric will have to survive at those temperatures as well, so that…. 00:48:08.000 --> 00:48:16.000 Constrains what materials we can use. But I think we have enough options to, uh, to do that. 00:48:16.000 --> 00:48:22.000 Uh, so what is the Sapphire-based substrate do exactly? I mean, how does that look compared to the…. 00:48:22.000 --> 00:48:23.000 So, uh, Sapphire is just… it's still just a passive, uh, substrate, it's just that it's harder to…. 00:48:23.000 --> 00:48:28.000 Um, the turn that you're sharing? 00:48:28.000 --> 00:48:29.000 To machine, uh, compared to silicon. If it's silicon, we know how to. 00:48:29.000 --> 00:48:33.000 Got it. 00:48:33.000 --> 00:48:35.000 Do all kinds of processing, and then it's real…. Hose from the back side to the front side, so that we can make contact. 00:48:35.000 --> 00:48:40.000 Okay. 00:48:40.000 --> 00:48:43.000 Very easily, so that you don't need to do anything. After we put out the film, you can just press that. 00:48:43.000 --> 00:48:45.000 Mm-hmm. 00:48:45.000 --> 00:48:54.000 Sample onto a, uh, onto the socket. If you will, then it'll start doing measurements. But if it's Sapphire, then. 00:48:54.000 --> 00:48:58.000 We need to figure out how we are going to. Create that, uh, that site, uh, through Sapphire VR. 00:48:58.000 --> 00:49:01.000 Got it. 00:49:01.000 --> 00:49:05.000 Uh, so there's a bit more challenging in…. Processing. 00:49:05.000 --> 00:49:12.000 Got it. Maybe, um…. Uh, Teb and I will discuss a bit more and get back to you. I mean, there…. 00:49:12.000 --> 00:49:21.000 There are materials that. Would be perhaps not super ideal, um, at these lower temperatures, but…. 00:49:21.000 --> 00:49:30.000 Maybe that's also, um, important data to collect in the spirit of Valerie discussing, um. 00:49:30.000 --> 00:49:31.000 Mm-hmm. 00:49:31.000 --> 00:49:41.000 You know, preparing databases of. Materials, so maybe with Ricardo, we're working on these very thin or very small feature sizes, which could potentially fit that budget, but…. 00:49:41.000 --> 00:49:44.000 Yeah, I don't know, Ricardo, did you have, uh…. Some ideas, yeah. 00:49:44.000 --> 00:49:46.000 Yeah, I saw Ricardo was on. Hey, Ricardo. 00:49:46.000 --> 00:49:53.000 Hello, yeah, I'm sorry, I know I joined a bit late, because I was in another meeting, so. 00:49:53.000 --> 00:49:59.000 Um, I think, um…. I don't have any… anything else to add, but…. 00:49:59.000 --> 00:50:06.000 Uh, I think it is good to see the potential synergies here, right? So…. 00:50:06.000 --> 00:50:07.000 Yeah, for sure. 00:50:07.000 --> 00:50:15.000 Yeah, so maybe if it's, like, if it's, uh…. I mean, we can discuss in more detail, maybe directly with you on…. 00:50:15.000 --> 00:50:17.000 Mm-hmm. 00:50:17.000 --> 00:50:23.000 What's the easiest way to test this out, and what kind of materials might be interesting for this? Because…. 00:50:23.000 --> 00:50:32.000 Doing the full device fab, um, is always, you know, a big lift for us as materials growers, so…. 00:50:32.000 --> 00:50:33.000 And so Zooming the… Zooming's magic in the… in the fab, so he's the guy. 00:50:33.000 --> 00:50:37.000 This is great to see. 00:50:37.000 --> 00:50:46.000 That's right, it could be a good platform, right, for…. Yeah, for various projects. 00:50:46.000 --> 00:50:55.000 Okay. Any other questions on the characterization for now, but…. I think zooming, you know, we can send this out and has contacts, and mine's there, and…. 00:50:55.000 --> 00:50:59.000 Ricardo's there, too, he knows how to…. Get ahold of us, and uh…. 00:50:59.000 --> 00:51:00.000 Um, one last comment that I had was perhaps, uh, among the characterization. 00:51:00.000 --> 00:51:05.000 Go ahead. 00:51:05.000 --> 00:51:13.000 Things that we could do, uh…. Uh, especially that I have more experience with the 2D material side, but. 00:51:13.000 --> 00:51:24.000 There are… there's some sort of information we can get from simple optical reflectance or absorption that could already tell you about disorder, and then try to correlate it with the electrical? 00:51:24.000 --> 00:51:35.000 Measurements, because try and see if… if we do a lot of… I know G1 grows a lot, and we could do our more detailed spectroscopy on large wafers, but…. 00:51:35.000 --> 00:51:39.000 For instance, if you can measure the absorption of the excited states. 00:51:39.000 --> 00:51:44.000 Depending on the quality of the film, that actually tells you something about dielectric disorder. 00:51:44.000 --> 00:51:49.000 I have a paper in the past about this, but we've always correlated that with, for example. 00:51:49.000 --> 00:51:59.000 Exiton transport, but not really…. Electrical transport, so this might be an interesting opportunity here if we're, you know… and statistics always helps in this. 00:51:59.000 --> 00:52:04.000 Yeah, Archana, I know you had ideas about, sort of, I know we talked at one time about, you know, looking at low defect. 00:52:04.000 --> 00:52:06.000 Yeah, yeah. 00:52:06.000 --> 00:52:11.000 Concentrations, that's a big… that's a big issue, too, for these 2D materials in terms of. 00:52:11.000 --> 00:52:19.000 Understanding whether. You know, point defects or line defects, if they're gonna matter or not, right, for the…. 00:52:19.000 --> 00:52:20.000 Manufacturing folks. 00:52:20.000 --> 00:52:29.000 Right, yeah, absolutely. Um, and so, um, our postdoc, Lacey Chen, setting up a new optical characterization setup, and I think. 00:52:29.000 --> 00:52:36.000 It would be really cool to just, you know, chat with Zooming and, um, and Tev and Ricardo and her to see if…. 00:52:36.000 --> 00:52:43.000 We can make it, um, in a way that the substrates can actually do really well for, you know, efficient optical characterization. We just leave it overnight, or something like that, yeah. 00:52:43.000 --> 00:52:48.000 Sure. Okay. 00:52:48.000 --> 00:52:55.000 So, I had another thought here. I also arrived a little bit late, so I think my brain was. 00:52:55.000 --> 00:53:05.000 Still catching up on exactly what's being proposed here. I do have a thought here, and so, again, I'm not sure if I'm completely understanding the graphic here, but. 00:53:05.000 --> 00:53:13.000 One of the issues we're having with… with the…. The project we're working on, which we're calling the Filaments Project. 00:53:13.000 --> 00:53:18.000 Is that we'd like to put a number of devices on top of our substrate. 00:53:18.000 --> 00:53:28.000 Um, and make individual contacts to those. And so we're kind of limited right now to the number of contacts we can wire bond directly. 00:53:28.000 --> 00:53:37.000 Trying to make, like, each… wire bond each device individually. Am I seeing something in the way here that you could…. 00:53:37.000 --> 00:53:43.000 Maybe potentially…. Do something with that, like, simplify that, or make it so that we could make. 00:53:43.000 --> 00:53:51.000 More contacts or have some sort of logic that, uh, on this underside substrate that your spring mounting to? 00:53:51.000 --> 00:53:52.000 Yeah, yeah. Yeah, so…. 00:53:52.000 --> 00:53:57.000 Such that you control which. Which, you know, which contacts are being made? 00:53:57.000 --> 00:54:01.000 Yeah, I think the idea is that, uh, we will pre-make. 00:54:01.000 --> 00:54:07.000 All the required, uh. Supporting structures, like electrical wiring. 00:54:07.000 --> 00:54:12.000 Um, and then for Optico, we talk about grading with other groups. 00:54:12.000 --> 00:54:23.000 Already on the platform before any material synthesis. So once…. The platform is done, it should be able to support many different kinds of measurements. 00:54:23.000 --> 00:54:27.000 Uh, including electrical, and if there is a need for having. 00:54:27.000 --> 00:54:33.000 Many, many electrical leads, I think that's something that Silicon can do very easily. 00:54:33.000 --> 00:54:34.000 Mm-hmm. 00:54:34.000 --> 00:54:39.000 So, yeah, we just need to incorporate. Your, uh, desired layout and structures into. 00:54:39.000 --> 00:54:43.000 Uh, the fabrication before the growth. And once that trip is there, then once they just grow the film on top. 00:54:43.000 --> 00:54:46.000 Yeah. 00:54:46.000 --> 00:54:50.000 Uh, it should already be there. Uh, and then once we can route that to the signal to the circuit board, then it can do whatever. 00:54:50.000 --> 00:54:54.000 Yeah, so…. 00:54:54.000 --> 00:54:55.000 Would want. 00:54:55.000 --> 00:55:02.000 Right, yeah, so the idea in our case is we're doing all, you know, back-end compatible processes, um. 00:55:02.000 --> 00:55:15.000 Depositing either, uh, probably… we're starting with just tungsten metal, um, doing some lithographic steps on it to make, you know, micro-slash-nanowires out of it, and then. 00:55:15.000 --> 00:55:34.000 Um, and then we want to, you know. Make context to each of these devices to supply a current through it, and basically what we're doing is, um, very small micro-heaters, which would then be chemically converted, right? And so currently, what we're doing is we're making a bunch of these devices with large pads, and then, you know, maybe one common. 00:55:34.000 --> 00:55:42.000 Wire on one side, and then, you know, individual contacts on the other, but we're having to wire bond to each of these individual devices. 00:55:42.000 --> 00:55:48.000 Right? And so…. Um, if there's some way we could… I don't know if multiplexing is the right word, or, like, uh… somehow do…. 00:55:48.000 --> 00:55:52.000 Yeah. 00:55:52.000 --> 00:55:57.000 Some sort of control on chip or on this chip that you're. 00:55:57.000 --> 00:56:10.000 Mounting it to, such that we could make contact to 100 wires, as opposed to, you know, using 10 wire bonds, as opposed to just being able to basically, you know, one-to-one 10-wire bonds equals 10. 00:56:10.000 --> 00:56:16.000 10, um, or 9… 10 wire bonds, you can get not in our current, like. 00:56:16.000 --> 00:56:17.000 Design. You can get 9 devices out of, right? Is that…? 00:56:17.000 --> 00:56:25.000 Yeah. Yeah, so I think there are two ways of doing that. One is through the circuit board, which we can then easily. 00:56:25.000 --> 00:56:33.000 Acquired commercial, um, multiple multiplexers for routing the signals. Another way is to build that multiplexing. 00:56:33.000 --> 00:56:38.000 Capability into the silicon. Itself. That's a more, uh, ambitious route, so…. 00:56:38.000 --> 00:56:41.000 Mm-hmm. Yeah…. 00:56:41.000 --> 00:56:45.000 But I think with the circuit border route, it should be easily, uh…. 00:56:45.000 --> 00:56:46.000 Achievable. 00:56:46.000 --> 00:57:01.000 Yeah, yeah, I wouldn't want to try and do that design on each of our test chips, right? We'll call them, right, that we're going to do these on. But yeah, and so, I'm liking this, what I'm seeing in terms of, like, a spring-loaded mount where we could mount these down. 00:57:01.000 --> 00:57:11.000 A much, you know, much simpler sort of lithographic process, and then we mount these down to something that has the… some sort of signal processing in it. 00:57:11.000 --> 00:57:12.000 Um…. 00:57:12.000 --> 00:57:21.000 We probably need to take… well, for good reasons, take it offline, because I think we need to get far in here for a few minutes. 00:57:21.000 --> 00:57:22.000 No, no, it's great, great conversation. This is what we're really wanting to do, right? 00:57:22.000 --> 00:57:26.000 Sure. Of course, sorry, yep. 00:57:26.000 --> 00:57:27.000 Okay. 00:57:27.000 --> 00:57:28.000 Far, are you still with us? 00:57:28.000 --> 00:57:32.000 Yes, yes, yes. I'm gonna be very, very quick, and try not to take that much more time, so…. 00:57:32.000 --> 00:57:36.000 Do you want to bring up your slide, or I can bring it up, or what do you want to do? 00:57:36.000 --> 00:57:39.000 No, it's okay, I can share it, I have it up here. 00:57:39.000 --> 00:57:49.000 Okay, so I just have a very few slides, and actually, uh, there are a couple of things. One is NSR chip. 00:57:49.000 --> 00:58:01.000 Has the thrust, right, where we are talking about ASEX and AI and co-design, but it's also very intimately connected with the other MSRC, the CHIME. 00:58:01.000 --> 00:58:02.000 Mm-hmm. 00:58:02.000 --> 00:58:10.000 Uh, which is the project that I lead. So, you'll see a little bit about that project as well, and see the connection between NSR Chip and. 00:58:10.000 --> 00:58:17.000 Uh, and chime vias. Okay, so what we are doing, um, in Thrust 3A is…. 00:58:17.000 --> 00:58:42.000 Uh, creating chips, uh, which are CMOS compatible, um, for growth, so this discussion just before my presentation was very, very relevant, because this might actually work out well, uh, for others as well. So, um, so what we are basically doing as a part of my MSRC, we are developing. 00:58:42.000 --> 00:58:48.000 Something like, um, 18 chiplets. And, uh, for 3 different applications. 00:58:48.000 --> 00:58:59.000 Hep, X-ray photon science, as well as for HPCs, the high-performance Computing. So this is being done through three organizations, which is, uh. 00:58:59.000 --> 00:59:12.000 Formulaab, Oak Ridge, and Berkeley. And, of course, there are many other universities that are involved as well. So, NSR Chip actually leverages two of the programs. 00:59:12.000 --> 00:59:27.000 Uh, that Fermilab is involved in. So one is the Chime, uh, um, MSRC Center, and the other one is the Nutcast-funded, uh, TBIP, the Test Vehicle Innovation Pipeline, which is both Fermilab as well as, uh. 00:59:27.000 --> 00:59:43.000 Slack. So through these two programs, what we are planning to do for NSRCHIP is create two sets of wafers, or two types of wafers, for further CMOS-compatible growth opportunities. 00:59:43.000 --> 00:59:52.000 One is an SOI wafer, um, which is through the TBIP program, and the other one is the CMOS bulk, uh. 00:59:52.000 --> 00:59:59.000 A waiver. So, with both these waivers, the thing that we are planning to do is back-end of line. 00:59:59.000 --> 01:00:10.000 Integration of, uh, sensing type of devices, and, um. Whatever material, whichever is CMOS compatible, and what we intend to do is. 01:00:10.000 --> 01:00:16.000 Create process markers in both these wafers, which will allow you to. 01:00:16.000 --> 01:00:25.000 You know, um, understand the basic health of the underlying transistors, as well as passive elements, based on your fabrication process. So that's one. 01:00:25.000 --> 01:00:32.000 Um, that's, uh, definitely something that we are aiming to do. Then the second thing we are also aiming to do is this. 01:00:32.000 --> 01:00:44.000 Underlying circuitry, uh, which will hopefully show us some. Uh, co-design. And the idea is that these wafers will become available for, uh, growth. 01:00:44.000 --> 01:00:55.000 Uh, by year 3 of the center, the first two years, the center is going to be focused on creating devices and everything. It's just not on CMOS wafers. 01:00:55.000 --> 01:01:11.000 Prefabricated CMOS waivers. Then, in year four, once the, you know, the… all the fabrication process is completed, it's actually between both year three as well as Year 4. Um…. 01:01:11.000 --> 01:01:27.000 The VIAS project in MSRC, uh, the CHIME MSRC, is also creating open source hardware and software for chip testing, and this is called SpaceBly. And the way we actually go about testing our 18 chiplets. 01:01:27.000 --> 01:01:37.000 Is through creating this unified interface and all plugins and, you know, test boards, which are uniform. 01:01:37.000 --> 01:01:57.000 And, um, have, um…. Very similar control and, uh, readout, um, electronics on almost all of these chips. So, for example, the programming interface that we have decided is a JTAG interface, and all these chips will use the same JTAG type of interface, so once we develop. 01:01:57.000 --> 01:02:13.000 That interface both for the design as well as for testing, we will end up reusing it for all the different, uh, different chiplets. Uh, with the SOI, um, there are two options. Actually, sorry, with, um. 01:02:13.000 --> 01:02:19.000 The bulk CMOS process, there are two options. One is we should be able to integrate the sensors. 01:02:19.000 --> 01:02:31.000 Um, as back end of line, on top of the wafer, as end of the topmost metal layer, but there's also the option of integrating the sensor. 01:02:31.000 --> 01:02:48.000 Uh, on the other side, on the back side, after a through Silicon via. That's because, um, the MSRC that I'm working on is really focused on doing, uh, 3D integration, so once there are two chips that are face-to-face connected to each other, the only way to. 01:02:48.000 --> 01:03:00.000 Access them is through the backside, and that's why, in some cases, you can deposit the sensor on the top, and in most of the other cases, you have to deposit the sensor at the. 01:03:00.000 --> 01:03:11.000 Uh, at the bottom. So, um, here is a brief overview of the Chimes, uh, VIAS project. Via stands for Vertically Integrated Artificial Intelligence. 01:03:11.000 --> 01:03:20.000 For sensing HPCs, and the idea is to try and build multi-layer heterogeneous, uh, stack. 01:03:20.000 --> 01:03:37.000 Such that there is a sensor layer, a signal processing layer, a computation layer, and a power delivery and signal transmission layer. So that's the… that's the goal of VS. It's leveraging a lot of. 01:03:37.000 --> 01:03:44.000 Previous work that has been already done and demonstrated in several of these areas by Fermilab. 01:03:44.000 --> 01:04:09.000 Um, so, like I mentioned, co-design is a big theme, and most of the AI algorithms that we are developing is actually scaling algorithms that we have already tried out. And, uh, like I mentioned, we have 3 applications in mind. The HEP, the X-ray photon science, and the HPCs. So, for example, for the HPCs. 01:04:09.000 --> 01:04:31.000 Um, the AI algorithm and the chiplets that we are developing is something that has already been investigated by Berkeley, and we are, you know, basically implementing it on chip and demonstrating, uh, beyond, uh, their first, uh, proof-of-principle demo, which was just the, um, RTL and hadn't been implemented on chip. 01:04:31.000 --> 01:04:40.000 So that's, um, uh, that's like a brief outline of what we are, uh, trying to do. 01:04:40.000 --> 01:04:54.000 And like I mentioned, um, for VIAs, the deliverables include several two-layer stack, three-layer stack, and four-layer stack. And, uh, you can see, uh, you can, uh. 01:04:54.000 --> 01:05:10.000 And it's our chip will be able to demonstrate or, um, grow these sensors, either on the, you know, one-layer stack, or on the two-layer stack to make the third layer, and the four-layer stacks where you'd have the signal processing, the data processing, and the photonics. 01:05:10.000 --> 01:05:15.000 As well included. Okay, that's it. 01:05:15.000 --> 01:05:22.000 Thanks, Mara. Any quick questions? 01:05:22.000 --> 01:05:28.000 Yeah, I think probably a good Angelo wasn't able to make it, and some of the other folks, but that's probably where the connection is. 01:05:28.000 --> 01:05:31.000 Yep. 01:05:31.000 --> 01:05:39.000 Well, I think we're about end. Any final questions, and I can send out these slides so that everybody has some contact information, but. 01:05:39.000 --> 01:05:44.000 It's also being recorded, so I think that, uh, that makes it easy. 01:05:44.000 --> 01:05:54.000 Alright, thanks everybody for coming, appreciate it. See you guys. 01:05:54.000 --> 01:06:14.000 Yeah.