ESB/DAQ Readout & System Testing

US/Eastern
Maria Zurek (Argonne National Laboratory), Zisis Papandreou (University of Regina)
Description

https://uregina-ca.zoom.us/j/98915102548?pwd=6Be10hz7OQ3WLS2NvFGKcenSx5MbF6.1

ESB/Systems Testing Meeting

November 4, 2025

Attendees: Tegan, Bo Gyeong, Norbert, Shinhyung, Jeonsgsu, Hyon-Suk, Bobae, Aram, Maria, Shefali, Henry, Akshaya, Halen, Zisis

Agenda

  1. Announcements, Minutes from Previous Meeting, Action Items
  2. Reports
  3. Any other Business
  4. Action Items
  5. Next meeting

Minutes

  1. Announcements, Minutes from Previous Meeting, Action Items:
    1. Maria summarized meetings from the last two weeks: i) TIC meeting where Jeongsu presented CERN beam test plans (application was due October 31). ii) small BIC subgroup meeting to discuss all beam tests (CERN, Hall D/JLab). iii) small BIC subgroup to discuss SiPM boards and HGCROC interface. iv) HGCROC chip repair from ORNL, being returned to ANL.
    2. Zisis mentioned that the GTLs finished the Base of Estimate budget for Production Phase as well as the Statements of Work (SoW) for Preproduction and sent these into BNL.  A joint Korean-N.American management meeting took place on October 24, with the next one planned later in November.
  2. Reports: 
    1. SiPM Boards: 
      1. Aram reported that he will order the Baby BCAL Boards (window board and amp/sum board) today with provision to connect to FADCs/CODA and no cooling.  Also, there has been progress on testing different components to reduce cost and power consumption.  He plans to coordinate efforts with Norbert and Hungary.
      2. Norbert detailed ideas for the production of the various boards and their rough timelines (short and long). Gabor will make new interface boards to connect to Aram’s boards.  Norbert requested more details on Aram’s signal amplitude and shape.  Aram has large amplitudes from Source+LYSO crystal and soon will execute a SFIL test to see MIPs.  We discussed modularity of Aram’s boards and what kind of bench tests we need to stage to lead to an operational SiPM+HGCROC test in the spring.  Norbert will provide details in the ‘notebook’.  Potential noise issues were discussed; at present these do not seem to be showstoppers.  Cost was briefly discussed.  Current amounts hold in our budget sheets, and will be refined in the spring after our series of bench tests. ETCs were discussed: last May, Norbert and Regina discussed that (as soon as government shutdown is over) their respective engineers will get together to design power for the ETCs and readout.  Also, AstroPix may need 8 amps which can necessitate a DC/DC converter.
      3. Shinhyung reported on progress at KNU.  They have 3 HGCROCs and are working on new FPGA boards in partnership with an expert.  She will add details to our ‘notebook’. 
    2. Beam Tests: 
      1. Maria showed slides with the summary of tests at CERN and JLab, including at this stage only the hardware that will be needed.    
  3. Any other business: None.
  4. Action Items:
    1. Everyone: 
      1. Add to ESB SiPM+HGCROC readout ‘notebook’: https://docs.google.com/document/d/1sYigAkFCmJEWc_ibXQEzfHkyYoaF8dK-/edit
      2. develop and log beam test plans; we will likely gather this info in another ‘notebook’.
  5. Next meeting: 
    1. November 11; joint meeting between Systems Testing and ESB & DAQ.
There are minutes attached to this event. Show them.
    • 09:00 09:10
      Announcements/Updates & Minutes Review 10m

      Briefing on recent developments and announcements

      Speakers: Maria Zurek (Argonne National Laboratory), Zisis Papandreou (University of Regina)
    • 09:10 09:30
      SiPM Boards Test Articles - Requirements and Plan discussion 20m

      https://docs.google.com/document/d/1sYigAkFCmJEWc_ibXQEzfHkyYoaF8dK-/edit

      Email from Zisis:
      We started a document as a kind of notebook to keep track of our discussions and decisions. (Obviously, a more formal technical report should follow sometime in 2026.)

      Aram is about to send the Baby BCAL amp/sum boards to be constructed (PED funds), These will have output compatible with FADCs/CODA. A following board design could interface with Gabor’s new interface board, or with modifications to HGCROC. That would be the BIC Board under PED funds. These will inform us towards the Pre-production boards later in 2026.

      For now, can you please review this above document before our Tuesday morning meeting? Please populate it with thoughts (how you see the connections happening), specifics (drawings, connector types from the first link folders), and pros and cons where there are options (eg voltage vs current input to HGCROC). Then we can discuss it on Tuesday.

      Speakers: Aram Teymurazyan (University of Regina), Norbert Novitzky (ORNL), Zisis Papandreou (University of Regina)
    • 09:30 09:45
      Beamtest 15m

      What do we need for which beam test. Let's discuss and make sure that we are all on the same page with requirements and deadlines for delivery.

      Speaker: Maria Zurek (Argonne National Laboratory)