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Cable management discussion - Roland Wimmer
DIRC support has issue with cabling
Gathered service estimates from detector groups. 2 options for service routing
E.g. dirc support cable cutouts is a bottleneck. TWo options shown
Found a few issues with fitting some of the cables in to certain bottlenecks
2.5x or 4x over the space for silicon cables around e.g. dirc support to be able to fit through space
Grouped all cables by power, signal, and cooling/gas lines to show what is worst offender
Have reached out to subgroups to try to figure out how to consolidate
Elke - looking into ways to distribute LV inside the detector with silicon experts. Discussions ongoing
Laura - Is this the most up to date model?
- no, it is 6-8 months old. Just recently got the most recent one
Laura - erd104 looking at serial powering or dc-dc conversions to reduce power cables. Current estimates for cabling are conservative
Laura - Routing of cables done by project or collaboration?
Elke - Project, since the collaboration does not have engineering person power
Or - engineering personal sits with project. If you had engineering personnel at universities or labs etc, can include them to work with project.
Silvia - groups that can bring engineering support are more than welcome, just need coordination with project
Jin - We have struggled both on space and material near barrel emcal. What kind of metal is in this region?
Roland - as far as I’m aware it is all copper, but don’t have all the material break downs. Definitely significant
Ernst - Also computed what the effective material would be in this area. Clear it will not be copper and needs to be refined. Further R&D in erd104
Elke - this is true for silicon, needs coordination with other detectors
Ernst - What was the assumption on cooling? Mix of liquid/air? Something else?
Roland - Took numbers from what was given to us from various subdetectors. Briefly discussed how we might unify some of these subsystems, but no formal ideas planned
Ernst - How do we go about solving this problem?
Roland - too many variables at play right now - working on it and more discussion needed
Gerard - Are these slots a solid slot that you need to feed the cable through? Can we spread the cables out uniformly?
Roland - Most cables are small themselves, but we need to find new space
Alexander - First part is echoed by Ernst’s question. Next question is there is not a lot of time before CD2 - any changes will be a major disruption. Integration space for detectors should be frozen soon
Roland - trying to get it right the first time since changing is very disruptive
Thomas - Still some detector decisions to be made, e.g. barrel ECal. Did you do a similar exercise with the imaging calorimeter?
Roland - Right now barrel sciglass has cables coming out the end. Where they come out is not a big deal because there is access space. Looking at both the sciglass has more cables, so I took their numbers although there is not a large difference between the two. Same thing for mRICH/pfRICH. Don’t see any major issues either way.
Xiaochun - My impression is that this is an initial discussion, still lots of uncertainty in design. Technologies still under development. Perhaps we should have a half day workshop to figure out where we are and what limitations are.
Roland - would be a good idea
Backwards rich discussion - GD/I conveners
Xiaochun - one of the arguments for not using backwards TOF (bTOF) is no clear physics requirements. My interest is to help clear background
Thomas - is the question how or if at all we need this?
Below threshold level need some kind of TOF for PID requirements
Thomas - main purpose of bTOF is not PID because there was not a clear physics argument, but for timing of t0. Provided mostly from scattered electron in this case. Other ways to do this with e.g. vertexing but this is one of the main purposes for the LAPPDs
Xiaochun - What was the timing resolution requirement?
Thomas - I think it was 25 ps
Oskar - this is what the LGADs get us, I think Brian estimated below 20 so we should expect a little better. Should match AC-LGAD
Xiaochun - take away is TOF will provide good t0. No other detector can do this?
Thomas - Can bootstrap if you have 4pi coverage but the argument is for the scattered electron t0
Xiaochun - just to make it clear, it is only aerogel there is no other radiator. Just would say this
Alexander - Effort led by project to secure manufacturer for radiator
Xiaochun - For radiator, may need to stack two towers of aerogel with different index of refractions for pfRICH. What uncertainties are required for this type of aerogel? For mRICH any aerogel around n=1.03 should work. For pfRICH there may be different requirements.
Silvia - A model of the RICH has to be elaborated and presented. All these elements should be a part of this discussion. When possible they should be compared about realistic producers.
Xiaochun - picking radiator is one of the risk factors we want to mitigate.
Xiaochun - Also we are trying to build the best detector for EIC. We should work together
Alexander - what is meant from 5d-5g? How is this in sync with erd109 and project ideas? How is this blended with the requirements from the project? What are the timelines?
Silvia - Matter of sensors and FEE is key. Sensor without appropriate FEE will not perform. Proponents should propose a realistic model in which whole subdetector concept can work. Could potentially propose two options instead of 1, up to proponents.
Alexander - Completely agree, just how do we respond to this charge? Unless ASIC is supported by project it won’t be taken seriously
Xiaochun - As far as mRICH is concerned, heavily rely on project R&D work as Alexander pointed out. By time of March, we won’t have any progress on this. Doesn’t seem realistic as we have only been focused on optical characteristics and mechanical integration. Important in the long run but difficult in short time period
Alexander - my point was a bit different, but this is also relevant. Can come up with a tentative ASIC solution but ideally we should rely on what project and erd109 proposes. If we don’t get there by now and march there won’t be much to say except for specifications. Still confused
Xiaochun - Need to be realistic, which don’t have a solution on the table yet.
Alexander - would not make sense to come up with an idea that isn’t blessed by the project.
Elke - Confused by this discussion. My approach would be to make a clear definition of what the ASIC requirements are if it is an LAPPD readout. For SIPM readout dRICH has identified a possible candidate and could work here as well. Can work with electronics to see if chip from NALU or whether or not there are other ASICs which can do this and provide high performance timing.
Thomas and Silvia agree their points have been covered. This should be answered at the extent possible