ePIC AC-LGAD TOF DSC Weekly Meeting Wednesday (10:30AM)

US/Eastern
https://bnl.zoomgov.com/j/1617546118?pwd=qNzxLqF8Q4Mj3RerAZdVSELzEgEQzV.1 (zoom link)

https://bnl.zoomgov.com/j/1617546118?pwd=qNzxLqF8Q4Mj3RerAZdVSELzEgEQzV.1

zoom link

Zhangbu Xu (Kent State University), Satoshi Yano
Description

eic-projdet-tofpid-l@lists.bnl.gov

Here is the detailed meeting minutes from the TOF-General Meeting held on May 7, 2025
 
1. Introduction (Satoshi Yano)
• Zhangbu was absent, so Satoshi led the meeting.
• Purpose: to prepare for the upcoming meeting with the ePIC Project Management (PM).
• Key topics for discussion:
• TOF timing resolution requirements and design
• Assembly and QA/QC framework
• Modular structure and interconnect method selection
• Meeting time coordination
 
 
2. TOF Assembly Philosophy and Modular Structure (Satoshi Yano)
 
2.1 Assembly Philosophy
• The TOF detector design follows three main principles:
• Fulfill physics requirements
• Avoid acceptance holes (dead areas)
• Simplify assembly and maximize efficiency
• A modular structure is preferred over a monolithic (single-piece) approach.
 
2.2 Module Design and Quantity
• One module = 3 full sensors + 2 half sensors
• 1 half-stave = 8 modules → double-sided, 32 modules per stave
• Estimated total: ~4608 modules required
 
2.3 Assembly Flow
1. Module assembly at dedicated sites (e.g., Hiroshima, UCSC)
2. Half-stave assembly by connecting 8 modules on a 1.4 m stave
3. Tray integration to be conducted at BNL
 
2.4 Site Requirements
• Module assembly requires sensor handling jigs, wire bonders, glue dispensers, etc.
• Half-stave connection under study: wire bonding, ACF (Anisotropic Conductive Film), or TAB
• Final integration at BNL (tray + mechanical support)
 
 
3. QA/QC Structure and Challenges
 
3.1 QA Responsibility and Discussion
• Sourav’s suggestion:
• QA for FPCs and interposers should be done at module assembly sites (e.g., Hiroshima, UCSC).
• Centralized QA/QC centers are preferable to maintain consistency.
• Simone and Matthew’s input:
• QA tools (e.g., network analyzers) are costly (up to $100k).
• Proper impedance and insertion loss tests are essential for high-speed signal lines.
 
3.2 Actions and Response
• Satoshi: will ask Takashi to give a presentation on QA procedure for FPCs.
• Proposal to invite international collaborators to Hiroshima for joint QA testing.
 
 
4. Timing Resolution and PID Performance (Satoshi Yano)
 
4.1 New Simulation Conditions
• Following Eric’s feedback, Start timing resolution revised from 10 ps → 20 ps.
• Sensor timing resolution evaluated at 25, 35, and 98 ps.
• Results:
• 25 ps: Overall TOF ~34 ps → π/K 3σ separation up to 2.11 GeV
• 35 ps: Overall TOF ~42 ps → degraded separation
• 98 ps: Very poor PID performance, especially for K/p
 
4.2 Track Length Uncertainty (δL)
• Even ideal sensors/electronics can’t compensate if δL is large.
• PID performance is strongly affected by δL from tracking.
 
4.3 Yulia’s Comment
• δL must be studied with full Geant4 simulation.
• Requires collaboration with the simulation and reconstruction group.
 
 
5. Sensor Test Status (Simone Mazza)
 
5.1 New Readout Boards
• 10 new 16-channel boards arrived.
• Some are used for pixel sensor testing; remaining ones available for strip sensors.
 
5.2 Gain Layer Uniformity (Depletion Voltage)
• 50 µm sensors: 55.3 ± 0.2 V (±0.4%) → extremely uniform.
• 30 µm sensors: 5.72 ± 0.13 V (±0.2%)
• Spatial variation suggests possible misalignment during ion implantation.
 
5.3 n+ Layer Resistance
• All measured values ~2.2 kΩ (design = 2.0 kΩ)
 
5.4 Strip Capacitance
• Large discrepancy between measurement (10s–100 pF) and TCAD simulation (~10 pF at 1 GHz).
• Likely due to measurement setup or pad geometry.
 
5.5 Upcoming Plans
• Repeat the tests for 30 µm and half-size sensors.
• Developing a probe card for CV (capacitance-voltage) measurements → potential for automation.
 
 
6. Upcoming Meetings and Announcements
• Next TOF-General Meeting: May 14, same time
• Coordinators Meeting: May 8 (Thursday), 5:00 JST
 
 
7. Action Items
There are minutes attached to this event. Show them.
    • 1
      meet with EIC project and ePIC managements

      action items:
      A. physics requirements:
      BTOF time resolution requirements to overlap with hpDIRC
      FTOF tracking position resolution: do we need 500um pitch?

      B. BTOF stave modular?

      C. mechanic design for FTOF

      D. DSC coordination and meeting time (is it optimal?)

    • 2
      Time resolution requirements on BTOF
      Speakers: Satoshi Yano, Satoshi Yano (Hiroshima University)