ePIC pfRICH ASIC / FPGA backplane design meeting

US/Eastern
    • 10:30 10:50
      Introduction & BNL status report / plans 20m
      Speaker: Alexander Kiselev (BNL)
    • 10:50 11:05
      OMEGA group status & plans 15m
      Speakers: Christophe de la Taille (OMEGA CNRS/IN2P3-Ecole Polytechnique (FR)), Damien Thienpont, Pierrick Dinaucourt
    • 11:05 11:20
      Uni Debrecen status & plans 15m
      Speakers: Gabor Nagy, Miklos Czeller
    • 11:20 11:30
      CERN beam test 10m
      Speaker: Norbert Novitzky (ORNL)
    • 11:30 12:00
      Discussion 30m