- Preliminary Design Review in October (Alex and Yulia)
- Similar charge to past reviews.
- Focus on mechanical design and integration aspects missing from previous reviews (e.g. cooling).
- Roman pots, OMD, and B0 the detectors being reviewed.
- Mechanical integration and design progress
- B0 systems (Yulia Furletova)
- Work progressing on placement of front-end RDOs and a cooling scheme for the tracking layers.
- Discussion needed between B0 groups and groups working on Roman pots/OMD to see if the RP/OMD cooling scheme can be workable for the B0 as an option, or if the focus should be on the air cooling concept being discussed.
- Follow-up meeting needed --> should be scheduled in next 1-2 weeks.
- ZDC (David Ruth)
- Work progressing on support table and motion system to raise/lower ZDC and slide out on rails for maintanance. Table found from vendor, specs being discussed to get quote, etc.
- Roman pots/OMD (Alex Jentsch)
- Conceptual design for layout of planes and motion systems presented.
- This concept has no solutions presented yet for the support frame, cooling integration, signal feedthroughs, etc. --> it is only a basic layout which will meet our needs and be workable for the scattering chamber design, and provide input to new impedance calculations.
- Follow-up meeting with IJCLab needed to begin discussing a more detailed mechanical design, especially for the support frames and cooling integration.
- Meeting also needs to include Jack Fried from BNL to discuss the integration of the PCB/stave design with the cooling solution from IJCLab.
- EICROC0A, EICROC1, EICROC2 updates (Christophe de la Taille)
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- EICROC1 (prior to metal fix) shipped to BNL (60 chips) along with 2 additional test boards.
- TSMC fixing other batch of chips now --> expect them back in 2-3 months.
- Results presented on EICROC1 testing and EICROC0A testing.
- ADC results with EICROC0A look good - ADC waveforms look good, ADC linearity looks reasonable. Minimum detected charge ~ 5-6fC. Jitter looks okay, but some TDC calibration needed.
- Similar studies done with EICROC1 --> TDC has some structure which still needs to be understood.
- TSMC discontinuing 130nm productions now rather than later, which forces a change of plans for EICROC2.
- Hope is for alternative vendor which can still use 130nm technology, or something similar (perhaps less radiation hard); moving to 65nm will be 2x more expensive, and require more work for a redesign of the current EICROC2 concept.
- More discussion to follow in the coming months.
- EICROC0 testing at IJCLab (Dominique Marchand)
- Results presented from late April on testing of sensors + EICROC0 with IR laser.
- ADC distributions look very nice, and charge sharing observed with neighboring pixels.
- Barycenter calculations performed using ADC data and spatial resolution < 20um acheived.
- EICROC0 testing at BNL (Alex Jentsch)
- ASIC threshold and Vref calibrations performed and look resonable.
- Issues in collecting data from SR-90 source with internal trigger.
- Scope output (preamplifier, TRGOUT, ACQ signal) looks okay, but ADC data looks like the ADC peak from the hit is being missed (Christophe's comment).
- Will study more carefully the affect of various delay settings on the timing between TRGOUT and the close of the ACQ window.
- Requested some pictures of the analog output from the shaper/integrator and the RtR amplifier to aid in our debugging at BNL.
- Collaborating meeting in July @ Glasgow (Alex Jentsch)
- Discussion of tentative schedule --> draft on Indico by the end of the week.
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