ePIC SVT WP3 Electrical Interfaces Meeting

Thursday 14 Nov 2024, 10:00 → 11:00 US/Eastern

10:00 → 10:05 Introduction¶

Speakers: Marcello Borri (staff@stfc.ac.uk), Zhenyu Ye (Lawrence Berkeley National Laboratory)

-Appointment of co-convener: Dr. Zhenyu Ye;

-Extension of WP3 meetings to 2025: every month on the 2nd Thursday; OK? OK, agreed, no issues raised at the meeting.

-Extension of WP3 meetings to 2025: current time 10am ET, to move to 11:00 -11:30 am ET to allow for a softer start in the US west coats (08:00 - 08:30 am PST). OK? OK, agreed 10 am ET, no issues raised at the meeting.

 

10:05 → 10:15 Prototyping: Disk FPC¶

Speakers: Xuan Li (Los Alamos National Laboratory), Zhenyu Ye (Lawrence Berkeley National Laboratory)

-Desirable: to prepare a presentation for next time to share the strategy to develop Al FPCs with Omni.

10:15 → 10:25 Prototyping: OB FPC¶

Speakers: Andrew Hill (staff@stfc.ac.uk), Ihor Tymchuk (RPE LTU), Joellen Renck (Los Alamos National Laboratory), Marcello Borri (staff@stfc.ac.uk), Todd Huffman (member@ox.ac.uk;staff@ox.ac.uk), William Helsby (staff@stfc.ac.uk)

20241114_epic_svt_wp3_qflex_b-fpc_updates_lanl.pdf

20241114-obFpcInspection-rep-2021a10.pdf

-Inspection of low TRL OB FPC protypes at DL; OK, Sanity checks : visual insepction of FPCs looks good, spTABs align with pads on interface PCBs as expected;

-Status on interconnection of low TRL OB FPC protypes in UK: Wedge for spTAB ordered, estimated delivery 11/12/2024;

-Updates from LANL; To check the impedance of differential tracks with Q-Flex; May need to order a different prototype with impedance matched tracks;

-RPE LTU update on daisy chain structures to compare spTAB with wire bonding; RPE LTU to provide proposal in the next weeks;

10:25 → 10:30 Prototyping: IB FPC¶

Speakers: Andrew Hill (staff@stfc.ac.uk), Laura Gonella (INFN Trieste)

20241114-ibFpcDiscussion-rep-2021a10.pdf

20241114-NoteOnMaterialBudgetES.JPG

-Definition of the features to put on mechanical dummy FPC to be used for intital IB assemblies; OK to make an FPC mock up for LEC of wafer scale sensor; OK to replicate material budget from ITS3 as initial configuration; OK to put wire bonding pads/areas in the side of the FPC facing the wafer scale sensor; OK to add pads the back end of the FPC to test continuity;

-Discussion on tests to do with low TRL OB FPCs in Trieste; Discussed electrical tests of FPCs in curves configuration; Effort from Triest availalbe from Jan 2025; Trieste happy to spTAB m-FPC to interface FPC at their site;

10:30 → 10:45 Further brainstorming¶

20241114-obModuleDevelopmentImage-rep-2021a01.png

-OB module desing progressing: ported ALPIDE-like tooling into CAD, working on definiton of potential future flat configuration for module.