AC-LGAD working group meeting -- July Collaboration Meeting Workfest (Glasgow)

→ US/Eastern
Description

Meeting for all AC-LGAD subsystems to discuss topics of common interest (e.g. sensors, ASICs, testbeams).

 

Join ZoomGov Meeting
https://bnl.zoomgov.com/j/1617546118?pwd=qNzxLqF8Q4Mj3RerAZdVSELzEgEQzV.1

 

 

General agenda:

  • Discussion of current testing results and the influence on QA.
  • Discussion on QA and assembly procedures - Sensor, ASIC, modules, staves
  • ASIC updates --> progress, plans, 130nm issue with TSMC for EICROC
Hide

EICROC and AC-LGAD testing status - some new results

Alexander Jentsch, Dominique Marchand

 

  • Discuss with the vendor regarding steps of flip-chipping and bump deposition. Any QA?

  • For next bump-bonding test, ENSURE the tech(s) know about the bonding pad on the electrode.

    • This is very likely the issue - these “bad” pixels are not well-connected and we are mostly seeing pickup.



EICROC testing and QA

Jennifer Ott 

  • Need to define QA/QC procedures

  • Ask vendors to provide QA/QC of the steps performed

  • Christophe’s comments:

    • TSMC (for example) will only do basic tests that the ASICs pass some simple on-wafer specs → we still need to perform on-wafer tests ourselves. Can outsource, but given the amount of time + $$$ money needed to export this to a company, better to do in-house.

    • HV pulse to the sensor can be used to test pixel connectivity to ASIC pads. --> Need to follow-up on this for an example.

  • Other comments:

    • ASIC testing much more time/resource consuming than sensor testing. Need to verify which institutions have the equipment to perform this QA on-wafer for the ASICs, and likely do not want to mix FCFD and EICROC testing in the same institution, if avoidable.

    • Need to begin thinking about “on-stave” tests of modules, what equipment will be needed, control of environmental conditions (temperature AND humidity).

 

AC-LGAD QA and testing 

Simone Mazza

  • Need to decide on criteria for QA for sensor HV response. Not all sensors have a “sharp” current increase near breakdown, for example - how to define the criteria?

    • IV-curve behaviour also depends on temperature & humidity (yes, but the latter can be ignored to the first order; should be humidity-controlled when testing at lower temperatures)?

  • Many questions were already brought up during Jenni's talk. 

 

EICROC0A and EICROC1 status and plans

Christophe de la Taille

  • EICROC0A results show a drastic reduction in noise (e.g. clock noise seen in EICROC0).
    • ADC linearity observed, jitter looks very promising, even with the TDC uncalibrated.
    • Current version cannot do pixel-wise adjustment -- "metal fix" available in Fall to correct this.
  • EICROC1
    • Jitter measurements still show some "wiggle" as a function of injected charge, likely from a multi-peak TDC distribution. To be investigated.
  • Next steps 
    • EICROC1 testing to understand issue with TDC.
    • Better understand risk with 130nm @ TSMC and identify best backup option(s).

 

EICROC2 digital architecture

Alexandre Soulier 

  • Alex Jentsch (slide 3):
    • Does clock gating really work with a streaming readout approach?  Seems we would want the missing information from before the hit for pedestals, or to ensure we can see the shared charge in neighboring pixels, even when threshold is not crossed in the neighboring pixels.

  • Alex Jentsch (slide 6):
    • We have performed initial calculations of hit rates per pixel, and estimated per ASIC for the far-forward detectors using AC-LGADs. Will provide. (email sent July 16th with link to slides)

  • Jeff Landgraf: I
    • n the case on the bottom left of slide 10 (backup), is it 15 or 24 pixels worth of data? Most of the hits on the AC-LGADs will produce neighboring pixels over threshold due to charge sharing. Low chance of a single pixel firing for a single particle unless charge deposit is extremely low.
  • Alex:
    • Does the clock gating cause pixels in the "8 neighbor" readout to not save ADCs if they don't ALSO cross threshold?
    • Christophe: no, as long as a pixel crosses threshold, all pixels in the vicinity (e.g. 8 neighbors) record ADCs.

 

 

Strip Sensor Test Beam Results and Plan 

Satoshi Yano (Hiroshima)

  • eRD112 FY23 and JFY25 sensors tested and have analysis results from the tests. eRD112 FY24 results not yet ready.
  • Comparison of FY23 and JFY25 sensors show similar or better results for the newer JFY25 sensors, for spatial resolution and jitter.
  • Results indicate that timing resolution performance depends on the spatial resolution of the sensor.
  • Total timing resolution for JFY25 sensors shows a higher timing resolution due an unknown additional contribution -> still being studied.
    • Perhaps from the timing reference.
  • Goal is to have this understood before the end of the year using TCT/Sr-90 testing.
  • Another KEK testbeam planned for Nov./Dec. 2026.
  • JFY26 production needs to have design finalized by August this year to have sensors received in early Spring 2027.

 

First Results of TCT Scan Measurements in Japan 

Kanato Matsutani (Hiroshima)

  • QA setups at both Hiroshima and RIKEN. --> Japan plans to have bTOF sensor QA coordinated between these two sites. 
  • Alex: are ALL bTOF sensors planned to be tested in Japan?
    • yes, that is plan. Goal is to have 2 probe stations at each site. 
    • Additionally, SVT sensors will have QA there.
  • New TCT system setup, with first measurements performed in July.
  • Initial results show S/N ~ 90 across whole sensor, and very high gain uniformity (~3.2% variation across sensor).
  • Measured spatial resolution from TCT is ~ 10um, consistent with beam test results.
  • Timing resolution measured as a function of position: jitter ~ 15ps at strip center.
    • When all strips combined with two-strip weighting, timing resolution is ~ 27ps for all 2-strip pairs across sensor.
    • Signal propagation also measured ~ 0.84 to 0.87 um/ps.
  • Lijuan: What is the story with the timing resolution requirement?
    • 95ps is the base requirement for the sensor + preamp performance, assuming 25ps electronic jitter and 20ps start time uncertainty.
  • Christophe: So what about the 50ps "missing" contribution to the resolution seen in the testbeam results?
    • these TCT results indicate that the likely culprit is the knowledge of the timing reference, but still seems strange given the timing performance of the MCP-PMT.
    • Satoshi: The issue could be the digitizer used to read the MCP-PMT signal.

 

FCFD - status, plans 

Artur Apresyan (FNAL)

  • Overview of FCFD status and plans. FCFD1.2 just arrived at CERN, hopefully at FNAL week of July 20th. First full-functionality chip, but 6 channels.
  • FCFD v2, ready by end of 2027, and possible FCFD v3 by end of 2028, dependent on results from FCFD2.
  • Satoshi: Is it possible to have a FCFD1.2 testboard which can accommodate full size sensor? Artur - is this needed? The 1.2 ASIC is only 6 channels, so have full-size sensors would lead to even more channels being unused and make the board more unwieldy.

 

FCFD variant for RICH detectors 

Raymond Dawson (JLAB)

  • goal is to produce a modified FCFD (FCFD variant) to be compatible with the HRPPDs.
  • preliminary tests done with FCFDv1.1 using testboard designed for this purpose.
  • Laser tests performed.
    • Timing measurements (sigma of time difference between CFD and photodiode) yield a result right at spec (~ 39ps measured, 40ps desired)
  • Timing resolution measured for HRPPD + FCFD as a function of signal amplitude -- result is around 30ps, but has expected behavior -- resolution improves with higher signal amplitude.
  • setup for HRPPD planned to be 8 front-end boards, with 32, 32-channel FCFD --> per HRPPD.
  • Variant being produced in parallel with normal FCFD chips, but FCFDv1.2 variant aimed for early 2027.
There are minutes attached to this event. Show them.