- Indico style
- Indico style - inline minutes
- Indico style - numbered
- Indico style - numbered + minutes
- Indico Weeks View
HEP-IC Workshop 2024 is the fourth in a series of workshops designed to bring together US scientists and engineers involved in developing integrated circuit electronics for particle physics and related applications. Participants from US laboratories and Universities will have an opportunity to learn about the latest activities and developments of the various groups, trends in IC design and fabrication, and new technologies that will be needed to enable future scientific goals. The workshop will also promote collaborations, exchange of ideas on innovative circuit techniques, and provide a forum to discuss new approaches to partnerships and optimizing the use of technical resources. This workshop should provide a high-level overview of activities, together with opportunities for discussions and exploration of new ideas and partnerships to address the technical challenges posed by the next generation of HEP experiments.
Advisory Committee | Organizing Committee |
---|---|
Angelo Dragone* – SLAC | Lorenzo Rota – SLAC |
Maurice Garcia-Sciveres – LBNL | Katerina Papadopoulou – LBNL |
Hucheng Chen – BNL | Grzegorz Deptuch* – BNL |
Jim Hirschauer – FNAL | Jim Hoff – FNAL |
university representative | Mitch Newcomer – UPenn |
* committee chair
Local Organizing Committee: Grzegorz Deptuch (chair), Sara Capp (logistics, venue, admin), Dominik Gorni (Indico webpage), Joao de Melo, Prashansa Mukim, Soumyajit Mandal.
Farah Fahim, Microelectronics Division Head, Fermilab
Includes:
Advantages for HEP from synergies with industry,
Working with National Labs,
Talk from DOE
Roundtable - Open discussion on barriers and potential solutions related to:
- Contracts with providers,
- License agreements,
- NDAs,
- DOE external contracts (CRADA, WFO) approval processes
Includes:
Sharing databases, design reuse,
Roundtable - Open discussion on barriers and potential solutions related to:
- Methods and rules for IP sharing,
- Tools interoperability,
- Acknowledgment of authorship,
- Legal agreements
Open discussion on barriers and potential solutions related to:
Methods and rules for IP sharing,
Tools interoperability,
Acknowledgment of authorship,
Legal agreements
Includes:
Sharing databases, design reuse,
Roundtable - Open discussion on barriers and potential solutions related to:
- Methods and rules for IP sharing,
- Tools interoperability,
- Acknowledgment of authorship,
- Legal agreements
Part 1:
Trends in pixel readout chip designs for high rate and radiation,
Precision timing in HEP experiments,
Monolithic pixels,
Front-end electronics for extreme conditions,
Integrated silicon photonics,
Wide band-gap semiconductors,
Part 2:
3D-IC status and trends,
Circuits and devices for edge AI,
Verification IP development,
Digital-on-top SoC methodologies and HEP applications,
Microprocessor IPs in scientific applications, eFPGA,
Technology trends and foundry services,
Trends in CAD tools and services,
Open-source ASIC ecosystem,
Roundtable: Open discussion on common methodologies, technologies, advanced modeling
Part 1:
Trends in pixel readout chip designs for high rate and radiation,
Precision timing in HEP experiments,
Monolithic pixels,
Front-end electronics for extreme conditions,
Integrated silicon photonics,
Wide band-gap semiconductors,
Part 2:
3D-IC status and trends,
Circuits and devices for edge AI,
Verification IP development,
Digital-on-top SoC methodologies and HEP applications,
Microprocessor IPs in scientific applications, eFPGA,
Technology trends and foundry services,
Trends in CAD tools and services,
Open-source ASIC ecosystem,
Roundtable: Open discussion on common methodologies, technologies, advanced modeling
Part 1:
Trends in pixel readout chip designs for high rate and radiation,
Precision timing in HEP experiments,
Monolithic pixels,
Front-end electronics for extreme conditions,
Integrated silicon photonics,
Wide band-gap semiconductors,
Part 2:
3D-IC status and trends,
Circuits and devices for edge AI,
Verification IP development,
Digital-on-top SoC methodologies and HEP applications,
Microprocessor IPs in scientific applications, eFPGA,
Technology trends and foundry services,
Trends in CAD tools and services,
Open-source ASIC ecosystem,
Roundtable: Open discussion on common methodologies, technologies, advanced modeling
Open discussion on future ASIC needs for HEP
Includes:
Advantages for HEP from synergies with industry,
Working with National Labs,
Talk from DOE
Roundtable - Open discussion on barriers and potential solutions related to:
- Contracts with providers,
- License agreements,
- NDAs,
- DOE external contracts (CRADA, WFO) approval processes
Includes:
Advantages for HEP from synergies with industry,
Working with National Labs,
Talk from DOE
Roundtable - Open discussion on barriers and potential solutions related to:
- Contracts with providers,
- License agreements,
- NDAs,
- DOE external contracts (CRADA, WFO) approval processes
Includes:
Advantages for HEP from synergies with industry,
Working with National Labs,
Talk from DOE
Roundtable - Open discussion on barriers and potential solutions related to:
- Contracts with providers,
- License agreements,
- NDAs,
- DOE external contracts (CRADA, WFO) approval processes
Roundtable - Open discussion on how to revitalize the Design Community:
- Where do the next generation of designers come from?
- How do they get trained in the system aspects of our design needs?
- How do we organize continuing education for our designers?
- How to attract members who have a foot in both communities, so that as detector design ideas are being conceived there are experienced designers at the table to help bring perspectives and possibilities?
Roundtable - Open discussion on how to revitalize the Design Community:
- Where do the next generation of designers come from?
- How do they get trained in the system aspects of our design needs?
- How do we organize continuing education for our designers?
- How to attract members who have a foot in both communities, so that as detector design ideas are being conceived there are experienced designers at the table to help bring perspectives and possibilities?